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Explorer
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Registered: ‎05-14-2017

program flash on zc702 development board

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Does anyone know how to program the qspi-x4-single flash on the ZC702 development board. I have a working VHDL design and a working bit file.

I have a logic only design (PL) which is created using VHDL not using the IP Integrator. (all Xilinx Tutorial always show creating the PL design with the IP Integrator) Can I program this bit file within Vivado of should I perform this in SDK.

1) In Vivado 2-018.2, I try to convert my bit file into a mcs file but I got an error stating the Flash Micron QSPI-x4-single is not supported. The Write CMEM wizrd shows the drop down menu for this Interface but I got an error message. Any idea or solution that I can try to create the MCS file?

2) I also try programming the Flash in SDK mode. I have created a boot image BOOT.MCS using a default FSBL.elf and supply the bit file. Then It failed when I boot from Flash.

What is the correct way to program the Flash in a ZYNQ device, if I created a design using VHDL only. Please provide the procedure.

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Scholar jg_bds
Scholar
692 Views
Registered: ‎02-01-2013

Re: program flash on zc702 development board

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@tchin123 wrote:

Thanks, I got it to work from SDK.

     You're welcome.

It seem like all the hooks to program the ZYNQ is in the SDK environment. This concerns with creating the FSBL, BIF and BSP which is needed to program the QSPI-4-single Flash.

To be complete with understanding the Programming process for Zynq device,, Is it right doing this within Vivado is not feasible.

Because the only process I could find is under the Tool>Generate CMEM pulldown menu and as mentioned before, Vivado doesn't support the QSPI interface that is used to generate the RTL bit file into a MCS file. I might be missing something, then what is the proper procedure to do this within Vivado.

     Remember: Vivado is the front-end Xilinx tool for Zynq PL design creation and for regular FPGA development. If you had been designing a stand-alone FPGA, Vivado is likely all you would have needed. But not so with Zynq; the PS in integral in Zynq development, so the SW that runs on the Zynq must be handled using SDK.

Lastly, for Zynq device development, is IP Integrator consider to be the most practical way for logic design, I say this because all Xilinx Tutorial always start with the IPI as oppose to RTL design.

     Many users overlook the greatest advantage provided by Xilinx SoC's. It's not the mere convenience of a PS & PL in one device. It's not the simplicity of the development. (It's certainly not the price.) The biggest plus is the hundreds of available connections between the PS and the PL--in the form of clocks, interrupts, GPIOs, EMIOs, and AXI interconnects. There's no multi-chip solution that rivals what you get inside a Zynq. The power of the chip comes from the integration of processor and HW.

Accordingly, the primary design flow requires the use of Vivado and SDK, since the only reason to use a Zynq is to utilize the PS and the PL. And within Vivado, because the integration between PS and PL must be dealt with, that's best handled with IPI.

If this flow creates too much of a burden, and you absolutely don't need the PS for your design's operation, it could be you're using the wrong device. Perhaps you should be targeting an FPGA instead.


 

6 Replies
Scholar jg_bds
Scholar
774 Views
Registered: ‎02-01-2013

Re: program flash on zc702 development board

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@tchin123 wrote:

Does anyone know how to program the qspi-x4-single flash on the ZC702 development board. I have a working VHDL design and a working bit file.

     Yes, a lot of us know how to do that.

I have a logic only design (PL) which is created using VHDL not using the IP Integrator. (all Xilinx Tutorial always show creating the PL design with the IP Integrator) Can I program this bit file within Vivado of should I perform this in SDK.

     You can program the PL using either tool. That doesn't mean you should, though.

1) In Vivado 2-018.2, I try to convert my bit file into a mcs file but I got an error stating the Flash Micron QSPI-x4-single is not supported. The Write CMEM wizrd shows the drop down menu for this Interface but I got an error message. Any idea or solution that I can try to create the MCS file?

     The PL section of the Zynq cannot program itself from a memory device--like most stand-alone FPGA's can.  Aside from JTAG programming using Vivado or SDK, only the PS can program the PL.

2) I also try programming the Flash in SDK mode. I have created a boot image BOOT.MCS using a default FSBL.elf and supply the bit file. Then It failed when I boot from Flash.

     I'm not exactly sure what you did there, but based on your earlier questions, it was probably the wrong thing to do.

What is the correct way to program the Flash in a ZYNQ device, if I created a design using VHDL only. Please provide the procedure.

     As mentioned above, only the PS can program the PL. You need to instantiate a PS in an IPI block diagram and configure it based on your board, incorporate your PL design and then run the Vivado tool through "Write Bitstream", export an HDF, read that HDF into SDK to create a HW platform, then build an FSBL against that HW platform. Create a HelloWorld program in SDK, too--since you're already there. The FSBL, the .BIT file, and HelloWorld should be combined into a BOOT.BIN file using SDK:

2019-01-14_16-53-26.jpg

SDK will then allow you to program the BOOT.BIN into the QSPI memory device that was configured in the PS:

2019-01-14_16-54-18.jpg

 


 

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Explorer
Explorer
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Registered: ‎05-14-2017

Re: program flash on zc702 development board

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Thanks, I follow most of you explanation. Your mentioned of "export HDF", is this the FIle>Export Hardware function in Vivado?

From the Hello_world tutorial, The PS (Zynq IP) is incorporated using the IP Integrator using the Create Block Design, but now I have to somehow add my VHDL file to the IPI before creating the bitstream file.

How does one incorporate the VHDl design into the exisiting Block diagram that has the PS block. This might be a fundamental question but I haven't use the IP integrator block design often until I start using the Zynq device, any advice.

 

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Scholar jg_bds
Scholar
757 Views
Registered: ‎02-01-2013

Re: program flash on zc702 development board

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@tchin123 wrote:

Thanks, I follow most of you explanation. Your mentioned of "export HDF", is this the FIle>Export Hardware function in Vivado?

     Yes. 

From the Hello_world tutorial, The PS (Zynq IP) is incorporated using the IP Integrator using the Create Block Design, but now I have to somehow add my VHDL file to the IPI before creating the bitstream file.

How does one incorporate the VHDl design into the exisiting Block diagram that has the PS block. This might be a fundamental question but I haven't use the IP integrator block design often until I start using the Zynq device, any advice.

     Ordinarily, one would package an HDL design as an IP, which can be selected from a repository and placed into a block diagram. That can be tricky some times.

     However, Xilinx has added a shortcut method. It's not as foolproof as pre-packaging, but it's worth a shot.

     Add your VHDL file as a design source to your project. It should show up as an object in the Sources list, outside of the block diagram. In Block Diagram context, (meaning: open the Block Design) select the Source object for your VHDL from the Source list, and right-click on it.  From the pop-up menu, select "Add Module to Block Design".  IPI will do its best to automatically create a block, and then place it into the block diagram. Since you don't have any connections from it to the PS, you'll just need to make all of the pins external (<CTRL><T>).

If you have a proper constraints file that handles the IO, you'll need to import that, too--or re-enter the information into Vivado.

 


 

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Explorer
Explorer
700 Views
Registered: ‎05-14-2017

Re: program flash on zc702 development board

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Thanks, I got it to work from SDK.

It seem like all the hooks to program the ZYNQ is in the SDK environment. This concerns with creating the FSBL, BIF and BSP which is needed to program the QSPI-4-single Flash.

To be complete with understanding the Programming process for Zynq device,, Is it right doing this within Vivado is not feasible.

Because the only process I could find is under the Tool>Generate CMEM pulldown menu and as mentioned before, Vivado doesn't support the QSPI interface that is used to generate the RTL bit file into a MCS file. I might be missing something, then what is the proper procedure to do this within Vivado.

 

Lastly, for Zynq device development, is IP Integrator consider to be the most practical way for logic design, I say this because all Xilinx Tutorial always start with the IPI as oppose to RTL design.

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Scholar jg_bds
Scholar
693 Views
Registered: ‎02-01-2013

Re: program flash on zc702 development board

Jump to solution

@tchin123 wrote:

Thanks, I got it to work from SDK.

     You're welcome.

It seem like all the hooks to program the ZYNQ is in the SDK environment. This concerns with creating the FSBL, BIF and BSP which is needed to program the QSPI-4-single Flash.

To be complete with understanding the Programming process for Zynq device,, Is it right doing this within Vivado is not feasible.

Because the only process I could find is under the Tool>Generate CMEM pulldown menu and as mentioned before, Vivado doesn't support the QSPI interface that is used to generate the RTL bit file into a MCS file. I might be missing something, then what is the proper procedure to do this within Vivado.

     Remember: Vivado is the front-end Xilinx tool for Zynq PL design creation and for regular FPGA development. If you had been designing a stand-alone FPGA, Vivado is likely all you would have needed. But not so with Zynq; the PS in integral in Zynq development, so the SW that runs on the Zynq must be handled using SDK.

Lastly, for Zynq device development, is IP Integrator consider to be the most practical way for logic design, I say this because all Xilinx Tutorial always start with the IPI as oppose to RTL design.

     Many users overlook the greatest advantage provided by Xilinx SoC's. It's not the mere convenience of a PS & PL in one device. It's not the simplicity of the development. (It's certainly not the price.) The biggest plus is the hundreds of available connections between the PS and the PL--in the form of clocks, interrupts, GPIOs, EMIOs, and AXI interconnects. There's no multi-chip solution that rivals what you get inside a Zynq. The power of the chip comes from the integration of processor and HW.

Accordingly, the primary design flow requires the use of Vivado and SDK, since the only reason to use a Zynq is to utilize the PS and the PL. And within Vivado, because the integration between PS and PL must be dealt with, that's best handled with IPI.

If this flow creates too much of a burden, and you absolutely don't need the PS for your design's operation, it could be you're using the wrong device. Perhaps you should be targeting an FPGA instead.


 

Explorer
Explorer
656 Views
Registered: ‎05-14-2017

Re: program flash on zc702 development board

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Appreciate for your in depth answer, Thx.

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