cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
281 Views
Registered: ‎06-01-2020

zcu 102 secure boot test issue Both sha386 and RSA decryption process will be stuck to wait done step

hi

     it Not smooth , when i try to test secure boot code.The following are the steps I debug(Since I do n’t want to write to efuse, I just want to verify the basic RSA function and SHA3 engines)

     1.make bif.the structure is 

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[pskfile]E:\zcu102make\input\psk0.pem
[sskfile]E:\zcu102make\input\ssk0.pem
[auth_params]spk_id = 0; ppk_select = 0
[fsbl_config]bh_auth_enable
[bootloader, authentication = rsa]E:\01_zcu102\01_code\00_try\zcu102_reset_try\Debug\zcu102_reset_try.elf
[pmufw_image]E:\zcu102make\input\zcu102_pmu.elf
[authentication = rsa, destination_cpu = a53-0, exception_level = el-3, trustzone]E:\zcu102make\input\bl31.elf
[authentication = rsa, destination_cpu = r5-lockstep]E:\01_zcu102\01_code\00_try\zcu102_app\Debug\zcu102_app.elf
[authentication = rsa, exception_level = el-2]E:\zcu102make\input\u-boot.elf
}

the two pems generated by bootgen.

2.take boot.bin to SDCARD after making step.

3.power on & booting.board.catch the following logs.

Xilinx Zynq MP First Stage Boot Loader
Release 2019.2 Jun 1 2020 - 16:15:27
Reset Mode : System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
FMC VADJ Configuration Successful
Board Configuration successful
Processor Initialization Done
================= In Stage 2 ============
SD1 with level shifter Boot Mode
SD: rc= 0
File name is BOOT.BIN
Multiboot Reg : 0x0
Image Header Table Offset 0x8C0
EfuseCtrl:0x0 ,BootHdrAttrb:0xC800
Authentication Enabled
SpkIdFuseSel:1

(log in XSecure_Sha3Finish funtion)

csu_status 1
csu_ctrl 0
csu_sss_cfg 5000
csu_dma_reset 0
CSU_FT_STATUS 0
csu_isr 8026
csu_imr FFFFFFFF
line:419
csu_status 1
csu_ctrl 0
csu_sss_cfg 5000
csu_dma_reset 0
CSU_FT_STATUS 0
csu_isr 8026
csu_imr FFFFFFFF
csu_status 1
csu_ctrl 0
csu_sss_cfg 5000
csu_dma_reset 0
CSU_FT_STATUS 0
csu_isr 8026
csu_imr FFFFFFFF
hash Status:1
XFsbl_SpkVer: Ppk Mod FFFE23E0, Ppk Mod Ex FFFE25E0, Ppk Exp 1000100
Ppk Modular START
B0 E8 6C 8C 29 FB B6 5B F5 C7 CC EC E2 A3 2C 6E
B2 04 D9 E5 5E 93 E8 7C 36 08 CA D9 99 4A 07 C3
60 CF 3F 14 21 6B BF 94 8F 62 F6 71 43 86 EF E3
32 A0 87 81 8D 5A 85 80 32 64 B3 DD E0 C9 AE CC
C2 DC 3F A7 4A 06 49 45 7C CC 55 4F A5 F3 AD 56
C7 16 1F 78 4D 43 4D A5 01 7C 66 22 7D FC 74 26
20 72 1F 71 37 39 96 11 68 24 4A 4E 93 E2 F4 2B
B9 33 AC 09 99 91 AA EB 1F BE 2A 30 12 BF 25 C5
FB 5F 28 58 08 CA 1F 86 C4 FB 99 34 F3 31 3E 5F
D2 77 AD B2 20 82 D2 72 57 DE BC 38 E4 30 6E 84
56 A3 02 BF 5E 5D 40 05 6B C4 57 92 2B 04 78 7C
7E AC A6 0D C0 B1 56 69 D6 8E A7 DF FD D6 68 E4
BB BB 55 36 4B 2E C4 B8 9B 4E 65 C2 44 60 CD 72
99 16 30 D0 3F DD CE 98 E0 DE DE EC 3F A1 70 BD
FC 39 32 14 37 A0 5D C6 F3 84 56 D6 FB 0A 7B 56
6C 87 09 FB BF C6 9F D0 A4 F1 31 3C AC F4 08 B9
C9 C9 54 31 0D 2C BD F2 BE 77 52 ED 85 A3 44 B6
95 AE DA FA D6 97 E1 EA 39 3A C5 36 13 DD 35 8C
FD 1B 4D A8 1D F3 05 13 E1 E1 7B 2E AD 88 DF 91
3D FE 6A E9 EB 0F 8C FF C6 CA AE AC 96 AD 32 10
CC 4D B3 DA A2 1C 75 18 5F F9 60 8F D6 3D F5 C0
7F B2 F7 19 D1 CD F1 77 B1 B0 D0 73 FF 2E EC D1
25 42 7B CA 36 9F A0 65 98 F5 10 55 A4 67 46 02
45 DF C7 59 7F 2A 0B 27 90 9E 7C 98 40 AF 6D 45
AE 65 9C 43 4D 9B 85 AC 21 63 31 85 DA BB AE 0D
9E F6 F3 F5 91 A9 AD 04 A6 C2 35 F6 16 A3 DA BE
84 96 11 61 CD 75 4C 08 AB BB 27 66 6F AE FC AA
99 1C 9B 33 BE 1F 7B 21 EB 75 7E A3 51 DB E3 CF
01 F7 80 BE 8D 87 DE BF 8D 8D 4F 2B 85 7D EA 08
3F B1 98 F8 D3 2A 27 AB 38 D5 64 D4 00 C3 F1 6C
BD DA B4 82 46 F4 D6 04 8F E3 85 D6 6D 3A 86 DE
D8 61 1B 7B 5C CC 77 C1 2C 59 30 36 06 E0 AD 6D

Ppk Modular END
Ppk ModularEx START
6B B6 2B E0 D5 36 04 36 C4 CD A0 7D CD A8 37 31
D0 69 F8 D8 C4 99 E4 59 34 3F 83 DB BC 33 54 D4
1D B6 98 D3 BD CE C2 88 99 05 6C A1 53 86 39 E1
5B 1E 0D D6 33 C7 8C 16 CA 01 E3 65 F2 0A 90 43
17 10 05 77 70 3A 8D 7D B8 FE F1 59 0B 5A 94 12
26 47 A9 74 83 6F BD B2 40 2C 92 C4 66 76 0B EE
18 6B AB 69 87 F6 D4 7D 9B 76 25 B5 38 AD 62 AF
A2 A7 4D 68 7B 61 62 33 66 09 CE 92 25 CD 8E E5
B7 06 CF CC 73 D5 BC D3 9E 1F 94 99 29 E0 66 3E
2F 55 8C D0 45 31 69 67 0E 5D 2E 01 BA 7A 62 ED
B8 F7 7E 4E 5B 45 84 DA F0 74 E5 F5 2B DB 61 1C
6E E0 45 60 B8 50 C3 72 78 90 07 12 2F AA E7 13
57 11 E2 50 14 2D FF F1 C5 03 F9 2A 0F 26 61 20
C5 B5 9A 6A D0 EA 23 7A 96 7C D0 AD 13 52 D0 E1
7D 76 8A BB 3C FA 20 1B F9 93 59 90 75 B3 92 C8
D6 AA 2C 87 64 01 EE B3 A6 F1 F4 B0 E1 71 42 B1
2B FE 92 ED 75 4A EC 85 F3 24 5F AA A4 D3 51 5E
DA 18 F9 E3 F9 86 0A 2C F5 3D 3B 84 CF 11 4D 3F
65 6C 14 07 CB 32 29 4C 7E BD B5 7D A1 2D 21 A9
89 45 92 37 30 3C DE 7E 34 A0 56 D2 92 58 F1 76
7C F5 A5 EE 76 F1 31 EE 08 86 8B E8 ED 30 55 5E
EC EA DA 21 20 35 46 03 AA 8E F4 7C A6 9E 23 72
33 1A AA 08 43 19 BD 3E C9 A2 CD F3 A1 09 0A 0F
C1 ED 7A 2C E7 20 EF 86 47 30 56 61 32 A6 DC A1
DE 49 02 92 50 6D 5D 73 76 3F A4 3B AE 37 CC CE
A8 8F 9C 63 91 22 55 3D 49 31 13 E1 39 80 DD F9
95 8B DC 65 7B D7 A3 20 A8 16 48 C1 E4 83 09 8F
C2 D9 6D 6F DA B7 D7 3F 04 D6 FF 9F 30 2A 2E A9
A5 48 F7 90 69 58 47 42 29 6B 3F 2F F3 50 6E A9
74 74 6B 95 A1 8A BC 22 5C E7 A3 FF F6 27 64 31
DF AF B5 90 D0 0F 2C 15 E2 99 2C D6 DE F0 34 65
B0 CC 8B E4 7B 8C 34 9D E2 C1 51 16 60 3D CA 30

Ppk ModularEx END
Ppk Exp = 1000100
InstancePtr->SizeInWords:128 EncDecFlag:0 Size:512
state:0 ad:0xFFCE0000
state:0 ad:0xFFCE0000

the code occur error in wait done.

/* Check the SHA3 DONE bit. */
Status = XSecure_Sha3WaitForDone(InstancePtr);
if (Status != (u32)XST_SUCCESS) {
xil_printf("line:%d\r\n",__LINE__);
goto END;
}

I think sha3 engines is not well work.

so why is it happens?

0 Kudos
1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
59 Views
Registered: ‎10-11-2011

Is the non-secure boot flow working correctly?

Are you sure the ZCU102 doesn't have security disabled for export control?

 

 

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos