cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
684 Views
Registered: ‎11-08-2019

Arithmetic operations using Xilinx ISE 12.4

Jump to solution

Hi, 

I'm new to FPGA. I'm using the Xilinx ISE 12.4. I would like to do simple operations like +,-,* and /. 

However I'm unable to do so. When I do something like sum <= a + b I get an error stating that "Found 0 defination for operator "+". 

Is there something I'm missing out?

Thanks for helping!

 

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Visitor
Visitor
491 Views
Registered: ‎11-08-2019

Thanks all.

I found out what the problem is. My bad, I did this a <= signed(b) + signed(c); where a is a std_logic_vector.

Instead, I should do this  a <= std_logic_vector(signed(b) + signed(c));

Thanks for all the help. I will improve along the way.

View solution in original post

8 Replies
Highlighted
Moderator
Moderator
674 Views
Registered: ‎08-16-2018

It looks you did not add the below libraries at the top, 

 

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
ieee.std_logic_arith.all;

And use  "unsigned(11 downto 0)"  (instead of "std_logic_vector(11 downto 0)")

 

Can you share the complete code as well if above doesn't resolve the issue. 

 


/ 7\7     Meher Krishna Patel, PhD
\ \        Senior Product Application Engineer, Xilinx
/ /        
\_\/\7   It is not so much that you are within the cosmos as that the cosmos is within you...
0 Kudos
Highlighted
Visitor
Visitor
651 Views
Registered: ‎11-08-2019

Hi merherp,

Thanks for the reply. I'm unable to put the whole code here as it is on my office workstation which does not have internet access. I'm just doing an IFFT of two signal and summing them together. 

IFFT_Output <= signed(IFFT_Signal_1) + signed(IFFT_Signal_2);

I have added ieee.numeric_std.all library beforehand. After I added ieee.std_logic_arith.all there seems to be some error due to overlapping of the 2 library. 

Any possibility that it is due to the ISE version which does not allow me to do the operation above? 

Thanks for helping!

0 Kudos
Highlighted
Moderator
Moderator
643 Views
Registered: ‎08-16-2018

Please try below libraries as well, 

 

use IEEE.std_logic_signed.all;
use IEEE.std_logic_unsigned.all;

/ 7\7     Meher Krishna Patel, PhD
\ \        Senior Product Application Engineer, Xilinx
/ /        
\_\/\7   It is not so much that you are within the cosmos as that the cosmos is within you...
0 Kudos
Highlighted
Visitor
Visitor
635 Views
Registered: ‎11-08-2019

Hi merherp,

I added the 2 library. I also have use IEEE.NUMERIC_STD.ALL added. 

I'm getting these errors:

1) Multiple declaration of "/=" included via multiple use clauses (This error isn't present with only  IEEE.NUMERIC_STD.ALL library added)

2) Found 0 definitions for operator "+"

Thanks for helping

0 Kudos
Highlighted
Moderator
Moderator
596 Views
Registered: ‎08-16-2018
Do not try all the library together. Depending on your design choose the correct library,

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.std_logic_unsigned.all;

/ 7\7     Meher Krishna Patel, PhD
\ \        Senior Product Application Engineer, Xilinx
/ /        
\_\/\7   It is not so much that you are within the cosmos as that the cosmos is within you...
0 Kudos
Highlighted
Teacher
Teacher
591 Views
Registered: ‎07-09-2009
Im guessing your fairy new to VHDL,

A few things,
you really need to post your code so we can help, else were guessing

Libraries in VHDL,
Each provides a new set of operations, its called over loading,
so if you include two libraries that have the same action, then the compiler does not know what one you want to use,

Libraries in VHDL ( 2 )
as libraries add features, many companies have made libraries, some even mask as proper IEEE ones,
i.e. std_logic_arith is NOT a IEEE library and will lead to problems

https://www.nandland.com/articles/std_logic_arith_vs_numeric_std.html


<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
0 Kudos
Highlighted
Visitor
Visitor
501 Views
Registered: ‎11-08-2019

Thanks drjohnsmith and meherp.

At the moment I'm unable to post my code here due to work constrain.

I have tried adding the alternating betwee the libraries, ieee.std_logic_signed.all,   ieee.std_logic_unsigned.all and ieee.numeric_std.all. I get different errors with different combinations. 

At the moment still unable to use the + operator.

Thanks for helping.

0 Kudos
Highlighted
Visitor
Visitor
492 Views
Registered: ‎11-08-2019

Thanks all.

I found out what the problem is. My bad, I did this a <= signed(b) + signed(c); where a is a std_logic_vector.

Instead, I should do this  a <= std_logic_vector(signed(b) + signed(c));

Thanks for all the help. I will improve along the way.

View solution in original post