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Visitor dmittiga
Visitor
134 Views
Registered: ‎03-08-2019

Bug in System Generator Vector Mux: can't specify signed output

I am using Vivado 2018.3 with MATLAB 2017b and have discovered a bug with the Vector Mux block in the SSR library.

When specifying a User Defined output and choosing Signed, the underlying Muxs remain as unsigned output.

See the attached screenshots and model example. I specify the Mux output type yet the model shows it as unsigned.

 

vecmuxprops.png
vecmuxerror.png