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Adventurer
Adventurer
4,000 Views
Registered: ‎12-22-2008

Can I do hardware co-simulation using System Generator with JTAG rather than PCI? Can it support PCIe?

My computer is without PCI and only has PCIe interface. So if I want to do hardware co-simulation using system generator, do I only have to use JTAG? Does hardware co-simulation  support PCIe?
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3 Replies
Xilinx Employee
Xilinx Employee
3,978 Views
Registered: ‎09-28-2007

Re: Can I do hardware co-simulation using System Generator with JTAG rather than PCI? Can it support PCIe?

Which FPGA board do you have?

 

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Adventurer
Adventurer
3,971 Views
Registered: ‎12-22-2008

Re: Can I do hardware co-simulation using System Generator with JTAG rather than PCI? Can it support PCIe?

I want to use the board from the xilinx, but all the boards from the xilinx cannot meet our demands exactly. So I have to design a board by myself. I want to do hardware co-simulation using System Generator in the future. But my computer interface is PCIe rather than PCI. I don't know it can work in this situation. Is JTAG interface enough for me to do the hardware co-simulation. I want to know the pros and cons of different interface and to find the easiest way to make my board design simple.

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Visitor jacklalo020
Visitor
3,942 Views
Registered: ‎08-21-2008

Re: Can I do hardware co-simulation using System Generator with JTAG rather than PCI? Can it support PCIe?

The JTAG co-simulation is always possible if you have a JTAG header in your board. The PCIe co-simulation is not documented and Xilinx will provide a help only if you are a major compagny with an NDA. It's prety frustrating that Xilinx didn't make any effort to provide enough informations about their co-simulation other than the JTAG.

For the JTAG, the main problem is that you can't get full speed and you can't perform burst transfers.

I already tried to play with the boards provided with systeme generator, but they use an *.lna file that is a kind of netlist protected and with some informations about the chip used. So if the FPGA you are using didn't match the ones they provide you are done.

Can any body give more information about this *.lna files????

 

J

 

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