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Contributor
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Registered: ‎03-26-2012

Can we get output on FPGA board using HW Co-Simulation?

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Hello there,

                I want to develop a realtime system which includes interfacing of matlab & FPGA board (using Sys. Gen.) in which I need to display the results on the LCD placed on the FPGA board.

 

For learning purpose I am trying to glow some LEDs. It works perfect for HW Co-Sim., but It do not give output accordingly on the board even when I define the pins on Gateway Out block of the model. The model and the pin assignment is shown in the attachment.

 

Is it possible to get such thing as I want? i.e. to get output on board along with the HW Co-Sim.

 

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Jay Manvar.
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LED_HW.png
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Explorer
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Registered: ‎12-08-2010

I don't know how to generate custom library. can you please tell me how to generate it?

Jay, look for a MATLAB script named <your_custom_target_board_name>_libgen.m in the folder <your_custom_target_board_name>, where your plugin has been installed. Or you can save custom target plugin during generation in zip file. This archive also contains <your_custom_target_board_name>_libgen.m.

 

Execute this script from MATLAB command line and it will create a library with non-memory mapped gateways.

Best Regards,
Vitaly.

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Observer
Observer
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Registered: ‎05-16-2012

I am not sure, but is it really possible to ran the real hardware in a simulation environment?

 

Too me HW Co sim ist still virtual, since the whole code is packed and wrapped to be calulated in hardware, rather than in software (MATLAB). AFAIK you will have to build the real design.

 

 

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Registered: ‎12-08-2010

Hello, Jay.


Is it possible to get such thing as I want? i.e. to get output on board along with the HW Co-Sim.

Yes, it is possible.

 

Your model contains two different parts.

 

 

1. First part is actually your design:

LED_HW_01.jpg

 

You can simulate this part of model using generated netlist. But this simulation allows you only to check your design in Simulink without taking into consideration placing, routing and real delays in your target FPGA.

 

But you can generate for this part of model bitstream (using System Generator token). Then this bitstream could be written into FPGA. And if you set pins in Gateway In and Gateway Out ports, then these pins will be used in bitstream.


... It do not give output accordingly on the board even when I define the pins on Gateway Out block of the model. The model and the pin assignment is shown in the attachment.

Such pin assignment will let you get output only if you configure the FPGA using generated bitstream and provide some data to the FPGA pin assigned as input (Gateway In).

 

 

 

2. Second part of your model is used for HW-cosimulation:

LED_HW_02.jpg

 

HW-cosimulation allows you to feed input data to the model, then process it in the FPGA and get output data to Simulink. But you can declare some input/output ports as the physical pins of the FPGA. To do this, you need to create new custom board target plugin for HW-cosimulation. Look at pages 241 and 317 of System Generator User Guide:

http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_4/sysgen_user.pdf

There is a detailed description of non-memory mapped gateways and the process of creating custom board target plugin.

Best Regards,
Vitaly.
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Observer
Observer
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Registered: ‎05-16-2012

ok, but then this is a modified design ...

 

maybe it is reasonable to generally add additional io pins to be able to investigate some output also physically,(?)

 

 

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Registered: ‎03-26-2012

Hello Vitaly,

 

             Thanks for the reply. I got the things you have explained. But still have some doubts.

1st part : 

              In 1st part as I am taking input from simulink blocks I can't assign any pin to input. And other thing is that, I want to make a real time system which processes in MATLAB any gives output to FPGA and FPGA processes for the given input and gives output. Now I am getting output at the simulink (from FPGA) with one click(real time) but I also want to see the output on the FPGA board so that no one can doubt that "it is just a simulation" rather it is a HW implementation.

             And I don't want to download the bit file manually, I have already done it and after the successful output of the code, I put it in the Black Box and now I am trying to make it real time.

 

2nd part : 

             I have tried as per your guidance but still it doesn't work. The user guide tells to make changes in template files but the template files are general for Sys. Gen., what when we want to use it for other program? Moreover in the ucf file(in .zip folder) of the new custom board it shows the pins I have assigned but as you said it also need input pin, it do not give any output. 

can you explore the 2nd part if possible.

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Jay Manvar.
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Registered: ‎12-08-2010

Hello, Jay.

 

So you would like to HW-cosimulate the model with input from Simulink and output to the pins of FPGA.


             I have tried as per your guidance but still it doesn't work. The user guide tells to make changes in template files but the template files are general for Sys. Gen., what when we want to use it for other program?


No, you shouldn't change original board files. Template is provided just for reference.


Moreover in the ucf file(in .zip folder) of the new custom board it shows the pins I have assigned but as you said it also need input pin, it do not give any output.


You can set just output ports as non-memory mapped gateways. Input port is memory mapped. So you can feed data through it from Simulink.

 

Create new custom board plugin. Set your target FPGA, the parameters of JTAG connection, the clock pins and the pins of your output non-memory mapped gateways. Then install this plugin. Close System Generator's window with parameters. Open it again by clicking on System Generator token in the model. Now you should be able to see your new custom board HW-cosimulation target. Don't forget to generate library with custom non-memory mapped gateways and replace output gateways with them in your model before generation of HW-cosimulation block.

Best Regards,
Vitaly.
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Registered: ‎03-26-2012

Hello Vitaly,

 

Thanks once again for the reply.

 

__________________________________________________________________________________________

So you would like to HW-cosimulate the model with input from Simulink and output to the pins of FPGA.

__________________________________________________________________________________________

 

yes, exactly this is what I want to do.

 

 

______________________________________________________________________________________________________

Create new custom board plugin. Set your target FPGA, the parameters of JTAG connection, the clock pins and the pins of your output non-memory mapped gateways. Then install this plugin. Close System Generator's window with parameters. Open it again by clicking on System Generator token in the model. Now you should be able to see your new custom board HW-cosimulation target. Don't forget to generate library with custom non-memory mapped gateways and replace output gateways with them in your model before generation of HW-cosimulation block.

______________________________________________________________________________________________________

 

I have done everything except last two step 1) generating library with custom non-memory mapped gateways and 2)  replace output gateways.

 

I don't know how to generate custom library. can you please tell me how to generate it?


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Jay Manvar.
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Registered: ‎12-08-2010

I don't know how to generate custom library. can you please tell me how to generate it?

Jay, look for a MATLAB script named <your_custom_target_board_name>_libgen.m in the folder <your_custom_target_board_name>, where your plugin has been installed. Or you can save custom target plugin during generation in zip file. This archive also contains <your_custom_target_board_name>_libgen.m.

 

Execute this script from MATLAB command line and it will create a library with non-memory mapped gateways.

Best Regards,
Vitaly.

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Registered: ‎03-26-2012

Hi Vitaly,

 

    Thanks a lot for the solution, it's working perfectly. I still have one query. In this case it is working because we are glowing some LEDs and leave it (I mean timing does not metter here). But if we want to display some results on LCD then it is not working as it requires perticular signals to be set/reset at defined time. I don't understand the relation between timings of simulink and FPGA clk. Hope you can add some valuable thoughts on the topic "http://forums.xilinx.com/t5/DSP-Tools/How-to-cope-up-with-large-time-simulation-in-Simulink/td-p/234458" which will help me solving this LCD display problem as well as saves time to make my system real time so that I can show a demo (only if it takes less time) for my Dissertation.

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Jay Manvar.
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Registered: ‎12-17-2012

Hello ,

I also have the same problem. i am also  using hardware cosimulation  in my simulink model .ihave also tried all the steps you told.i have also created new custom board plugin . there is a lot of timing  difference in the simulink scode output and output on actual haraware pin.

 

 

i just want to ask you that is it possible  for eg .if i generate 1kHz sinwave in simulink model.and generate hardware cosimulink block for that model.can i get the same 1Khz ouptut on actual fpga board if measure on oscilloscope.

 

please help to solve my problem.

 

regards,

Amruta

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Hi Amruta,

 

HW-cosimulation has two options for clocking of simulated model in FPGA:

 

1) single-step clock (default),

2) free-running clock.

 

I hope Single-Step Clock mode may solve your problem. For more information you can refer the link given in the 9th message.

 

 

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Jay Manvar.
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Registered: ‎12-17-2012

Hello jay,

 

Thanks for the reply.

 

I have tried using both the clocks but stll i am getting different output.

 

please tell me that ,if we use hardware cosimulation the output on simulink window in matlab and actual fpga pin measure on oscilloscope is same or it is in some multiple .

 

if you have some example code can you please send me.

 

 

 

 

 

 

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Registered: ‎03-26-2012

Hi Amruta,

 

Once you send a data to FPGA, the performance of FPGA would totally depand on how you handle it there in FPGA. It would be better if you can attach your model here so that everyone can understand your problem and you can get better answer.

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Jay Manvar.
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Registered: ‎12-17-2012

Hello jay,

I am attaching my project Mdl file with result and result on actual scope.

The results in matlab scope are same as i have generated i.e 10 sec square wave.

 

But when i measured on oscilloscope it is showing about 1 ms.

 

As per the model pulse_generatoroutput,output_gateway  and output after hardware cosim block i.e output_ ofgateway1 is same as it on matlab .

 

but when i measured on tektronics oscilloscope on actual hardware pin it is different.

 

 

whyit is so.

pls tell me if there is anything wrong because i am new this.

 

 

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Hi Amruta,

 


pls tell me if there is anything wrong because i am new this.


 

Yes, there is a problem in the model. For Co-simulation of Simulink and Xilinx ISE or a Hardware Co-SImulation (e.g. Simulink and FPGA) you need to add a black box from xilinx block set to the model. An HDL(Verilog/VHDL) file should be assigned to the black box, which contains logic or the process that is to be done on lets say FPGA and it will return some output to MatLab Simulink, according to the logic.

 

To understand MatLab and ISE co-simulation you can refer the following link. 

http://jaymanvar.wordpress.com/2012/12/19/matlab-and-ise-co-simulation/

 

To understand Hardware co-simulation you can refer the following link. 

http://jaymanvar.wordpress.com/2012/12/19/hardware-inline-co-simulation/

 

Hope this may help you. Please feel free to ask if you have further doubts.

 

 

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Jay Manvar.
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Registered: ‎12-17-2012

Hi jay,

 

Thank for the reply.

But in my model i have generated the hardware co-simulatuion block.

And also output return after  hardware co-simulation in matlab simulink is same as what i have generated.

only problem is that on actual hardware pin i am getting different output.

 

 

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Sorry Amruta for the late reply,

 

I am running out of time, though I have tried the thing your way on the hardware but couldn't succeed and I am not sure where the problem was. What I suggest you for time being is you can try out my way by using "Black Box" in your model instead on delay block. You just need to assign your input to the output in verilog file. Other things can be followed from following link(to get output on hardware), you maybe knowing this.

 

http://jaymanvar.wordpress.com/2012/12/20/hardware-inline-co-simulation-with-output-on-fpga-development-board/

 

Hope someone else can help you with delay block model.

 

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Jay Manvar.
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Registered: ‎12-17-2012

Hi jay,

 

ok i will try with black box.

 

thanks again 4 ur support.

 

 

 

Amruta.

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Registered: ‎02-01-2020

If you are using Vivado based System Generator check my post over hardware co-simulation and non-memory mapped pins...

Best regards!

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