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Visitor edwarwl
Visitor
4,351 Views
Registered: ‎07-10-2008

Co-simulation with Multiple Subsystems in SysGen

I have a system with two subsystems on two different clock domains (using the Multiple Subsystem Generator block). I use To/From Registers and Shared Memory to communicate between the two different domains. Simulation of this system works as intended.

 

I am now seeing errors when attempting to co-simulate the whole system. The first error is similar to another user's experience (Problem with shared memory in SysGen) where I get the error "Could not create shared memory. A shared memory with the name "mclk_rdy" is already in use." This is true, because my other subsystem has a shared register of the same name (the corresponding side of the To/From Register). I temporarily "solved" this problem by tinkering with the .mdl file by hand and renaming the shared memories on one of the subsystems. This actually does work, strangely enough, but I wouldn't expect the co-simulation results to be correct. However, it doesn't matter because I run into another error.

 

The second error happens after the first subsystem is programmed to the FPGA. This error is as follows: "Error in Point-to-point Ethernet Hardware Co-simulation. Currently using Point-to-point Ethernet-based configuration. Failed to synchronize the FPGA device for configuration. A problem may exist in the connection between the host and the FPGA board. Please check... " 

 

I can co-simulate each of the subsystems on the FPGA individually with no errors (although the output is useless without the other half of the shared memories, as you can imagine). 

 

Has anybody else seen this?

 

 - LE

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Xilinx Employee
Xilinx Employee
4,332 Views
Registered: ‎09-28-2007

Re: Co-simulation with Multiple Subsystems in SysGen

You may want to check if the ownership of each shared register is set properly.  If there are two master shared registers block, one will fail when trying to create the shared memory object.

 

In case of co-simulation, the hardware co-simulation block is always the master of all shared memory blocks it owns. You need to change other shared registers in the model to be "owned and initialized elsewhere".

 

For the "Failed to synchronize the FPGA device for configuration" error, you may want to check if you have the System ACE bootloader running properly on the board. Consult the System Generator user guide for the setup procedure.

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