12-10-2018 09:15 PM
I need help with configurate the DDS compiler. I do my program in VHDL and i used de GUI for generate the core DDS. But i think it's wrong becouse when simulate not generate nothing. In sphase_td it must be see the value sin /cos in binary. Thanks you for your attention.
01-22-2019 02:54 AM
You can run the attached "dds_tcl.tcl" (see tcl.jpg) to create the DDS project which is shown in "final_design_by_tcl.jpg" .
Next run the simulation to see the sine wave which is generated by DDS.
Also, please see fig. 1.jpg to 3.jpg for settings and simulation results.