My current project is to generate a DDS core that can be configured via U.A.R.T, then output the waveform to the JB and JC PMod onboard the Zybo board, I believe this is a 16 bit width. I am able to generate the project, and even get some sort of output, but this output is jumbled. Is there a middle step I am missing to be able to use anoscilloscope to realize a square wave on the output? Even when generating a simple clock, the zybo external clock, to the pin T14, on the JD P mod, I get a differential wave. How can I make this a non differential, while maintaining the use of all 16 logic bits? I can attach the project if necessary but currently it is a hard configured DDS Compiler IP Core, directly routed to 16 pins aboard the P Mods J B and J C.