12-07-2012 01:44 AM
I used coregen to generate a dds as below parameters:
f_clk = 150 MHz
f_output = 150 MHz
B_n = 16 bits
I am interested on the sine/consine waveform and I have performed a simulation on modelsim. What I noticed was the sine wave generated by dds is always positive values which isn't a a full sine wave.
Is the dds only generated half/quarter of the sine wave? If so, I guess I need extra logics to get it work in a full cycle.
12-07-2012 07:23 AM
Yes. I've solved it by reducing the number of bits (phase) from 16 to 10. And it works. Don't exactly understand what happened.