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tranphan1980
Observer
Observer
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Registered: ‎04-18-2018

DPD_SMP error when start

HI  Support Team,
Currently, we are porting DPD in to our DFE design. In this design:
- we choose SMP mode for DPD.
- s_axi_ctrl_aclk and s_axi_user_aclk are connected to clock 200 Mhz.
- s_axi_ctrl_2x_aclk is connected to clock 400 Mhz.
- clock 200 Mhz and clock 400 Mhz are generated from clock FCLK_CLK0 (200 Mhz).
-
But, we have issue when start DPD:
--- Xilinx Digital Pre-Distortion v8.0
--- Build: Linux SMP: CL1734100
--- Opened DUnhandled fault: external abort on non-linefetch (0x818) at 0xb491904c
PD Device at /dev/uio0
--- Initialising DPD Software
--- DPD Tpgd = e6f38000
[b491904c] *pgd=36e45831imer Thread Created
--- Resetting DPD Timer
--- Initialised In, *pte=81c00743, *ppte=81c00c33terrupts
--- DPD Timer Thread Running

Bus error
Our device tree, you can see at the attachment.
Please tell us if you have any hint,
Best regards,
 
dpd.jpeg
dpd_clock.jpeg
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1 Reply
nathanx
Moderator
Moderator
748 Views
Registered: ‎08-01-2007

DPD v8.0 is only compatible with Vivado 2016.3, have you referred to DFE demo with DPD v8.0?

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