06-10-2013 12:53 PM - edited 06-10-2013 01:22 PM
What's the difference between having math operation (which synthesize into DSP48) to be clock sensitive or not?
I've tested XST synthesizes A/B/MREG into DSP48 if the pipeline registers are clock sensitive regardless the math operation to be clock sensitive or not.
Just being curious about if there is a difference or not? I imagine since DSP48 core runs faster than any clock, so it doesn't matter for the core to respond to clock edge or not.
Please comment, thanks,
06-11-2013 04:12 AM
this seems to be more of an ISE (XST) synthesis topic rather than DSP-Tools (like sysgen).
If you have some math operation it is not neccessarily implemented with a DSP48.
It might be, if the synthesis tool detects some advantage for this solution.
Now, if you have a combinatorical math function sourrounded by registers it is quite similar to having a synchronous math function.
The synthesis tool grabs some bigger chunk of the design and tries to put it into the DSP48 fabric if possible.
So the DSP48 will never be asynchronous even if the math operation has been coded without a clock.
See this page for DSP48 structure details:
With out any registers the multiplier won't use a DSP48.
Have a nice synthesis