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e_ensafi
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Registered: ‎08-13-2020

Deferred Creation of ADF Graph and Top-Level Connections

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So far, in every example that we have seen, a subclass of adf::graph is instantiated as a global variable, and the top-level adf::simulation::platform connections are also created in the same global scope.  Is it permissible to create the graph and its connection inside a PS host main() function, or at the very least, can we defer creation of the graph and its connections until after main() is invoked, perhaps allocating the graph and platform via "new" or a smart pointer inside the main() routine or some other function invoked after application startup?

 

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florentw
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Registered: ‎11-09-2015

Hi @e_ensafi 

Yes this is what I am saying. You define the PLIO in the AIE application so the compiler knows the placement of the IOs


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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florentw
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Registered: ‎11-09-2015

Hi @e_ensafi 

If you change the connections, then the full PL design would be changing. This is not something you can do at the moment (this would need DFX support which is coming in the future - and I am even not sure what will be possible).

You might still be able to compile multiple systems (so multiple xclbins) so you can change the full design


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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e_ensafi
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Registered: ‎08-13-2020

@florentw What if everything is identical, but instead of creating the graph globally, the graph is created inside main().  One use case would be for the PS to load constants at runtime and initialize C++ class kernels with those constants via their constructors.

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florentw
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Registered: ‎11-09-2015

Hi @e_ensafi 

For the moment, the only supported way is to have the full system compiled. I am not aware of any other flow supported at the moment


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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e_ensafi
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Registered: ‎08-13-2020

@florentw Perhaps my description was unclear.  The full system will be compiled, with all windows sizes and other details determined at compile time, as always.  However, instead of having my adf::graph and adf::simulation::platform declared at the global scope, I want to declare it inside main() as follows:

// graph.h
class MyGraph : public adf::graph
{
  adf::input_port in;
  adf::output_port out;
  // Declare and create kernels
  // Make compile-time connections as always
};

// host.cpp - see two options for main() below

// Can the following be moved inside main?
adf::GMIO gm_in("in", 64, 1000);
adf::GMIO gm_out("out", 64, 1000);
adf::simulation::platform<1,1> platform(&gm_in, &gm_out);

// Option 1:

int main()
{
  MyGraph gr;
  adf::connect<> net1(platform.src[0], gr.in);
  adf::connect<> net1(gr.out, platform.sink[0]);
  // Run graph...
  gr.end();
  return 0;
}

// Option 2:

void worker(std::shared_ptr<MyGraph> gr)
{
  // Run graph...
}

int main()
{
  auto gr = std::make_shared<MyGraph>();
  adf::connect<> net1(platform.src[0], gr->in);
  adf::connect<> net1(gr->out, platform.sink[0]);
  worker(gr);
  gr->end();
  return 0;
}

  

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florentw
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Registered: ‎11-09-2015

HI @e_ensafi 

This doesn't change my answer. I do not think the connections can be changed during run-time, at least not with the current solution


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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e_ensafi
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Registered: ‎08-13-2020

@florentw Understood, but to be clear, I am not changing any graph connections.  I am simply moving the top-level platform source/sink connections from the global scope into the main() function itself.  The graph connections are not affected at all, and the platform connections also stay the same, but they get declared inside a function instead of the global scope.  Perhaps the compiler expects to see the graph and connections in the global scope in the current implementation, is that what you're saying?

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florentw
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Registered: ‎11-09-2015

Hi @e_ensafi 

Yes this is what I am saying. You define the PLIO in the AIE application so the compiler knows the placement of the IOs


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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