02-27-2019 12:42 PM
I am trying to understand the output format of a High-Radix Divider Generator, particularly the fractional portion. I generated and simulated two versions of my divider to compare, one using a Radix-2 implementation and the other using High-Radix, both with signed inputs. In PG151, for Radix-2 mode, the fractional part of the output is defined as having a sign bit. So for my desired 16-bit fractional output, I defined it as 17-bit in the IP Generator and the simulation results are as expected. Using a similar approach for High-Radix, I get different simulation results.
Radix-2: dividend = -2622 (decimal), divisor = 1639 (decimal), quotient = 0xffffff6677 (integer = 0xfffff = -1, fraction = 0x16677 = -0.6). This makes sense as -2622/1639 = -1.6
High-Radix: dividend = -2622 (decimal), divisor = 1639 (decimal), quotient = 0xfffffccced - this does not make sense. If the fractional portion is 0x0cced (17-bits), that equals 0.4 using 17-bit fractional unsigned definition, or 0.8 using a 16-bit signed definition (as is the case in Radix-2). That leaves an integer portion of 0xffffe which is -2.
Can someone explain how to correctly intrepret the High-Radix output? It is not defined well in PG151. I suspect the simulation is correct and that the two modes differ in output format.
03-07-2019 09:42 PM
Check the "implementation details" tab on the Divider Generator IP GUI, which tells the user how the data is mapped.
03-08-2019 09:26 AM
Thanks nathanx, but that only says the fractional portion is in the 16 LSBs. It does not explain the results I outlined. In my example the fractional portion should equal 0.6 (or possibly -0.6 as in the Radix-2 format), but instead it equals 0.8 (i.e. 0xCCED => 52461/65536 = 0.8) . And the integer portion should equal -1 but instead it equals -4 (0xFFFC = -4).
This is either a bug in the High-Radix implementation, or (more likely) I am not understanding how to interpret the bit-fields correctly, and if so, the Xilinx documentation is lacking.
03-11-2019 10:22 AM - edited 03-11-2019 10:24 AM
Here are configuration screenshots of the High-Radix implementation. If it matters, I am not using this as part an AXI-bus based system. Using Vivado 2018.2.
03-21-2019 01:34 AM
Can you also share the radix-2 configuration? Is it the same with High-radix configuration? PG151 Equation 3-1, 3-2 and 3-3 provide details on how to calculate the quotient and frational remainder.
Can you also show the simulation waveform of Raidx-2 and High-radix which has all the inputs and outputs of Divider Generator IP core?
03-21-2019 09:15 AM
A friend helped me to figure this out. As I suspected, I was not interpreting the High-Radix result correctly. I was seeing a fractional value of 0.4 and a integer value of -2, and when added together you get -1.6 which is the correct answer. For some reason, I was thinking the fractional portion should've worked out to be 0.6 and the integer portion to -1 and then concatenated together, you'd get -1.6. I am not sure why I thought the two pieces could be concatenated together that way vs. added together. Stupid mistake in hindsight.
The Radix-2 implementation has a signed fractional portion, and it has a value of -0.6, and the integer value is -1. Added together you also get -1.6. Maybe this different format had got me thinking that the High-Radix result should also have a fractional portion with a magnitude of 0.6? In any case, problem solved.