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va87
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Registered: ‎06-17-2008

EDK Pcore Export with FSL bus connection

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Hello.
I have a question. I want to use System Generator as a Pcore for Microblaze project in EDK.
I use From Register and To Register blocks to access Pcore from Microblaze and FSL bus to connect Pcore to Microblaze in EDK project.
I export my design like a pcore, I create e new XPS project, I replace the pcore generated by XPS by the pcore denerated by SysGen, I write my softwares, and I don't obtain the right values...

Do you know if I've made an error?

Do you have documents relating to export a pcore from SysGen to XPS?

Thank you

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va87
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Registered: ‎06-17-2008

Hi,

  Thank you, in fact, it works using configure coprocessor. My error was I used the create peripheral tool and then, I try to integrate my core... and it's easier because I just have to copy the directory of my pcore generated by SysGen in the directory pcores of EDK...

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rjduran
Xilinx Employee
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Registered: ‎08-02-2007

In the Sysgen 10.1 users guide there is a section titled "Hardware/Software Co-Design in System Generator" that discusses exporting a Sysgen design as a pcore.

 

 

RJ Duran
Customer Application Engineer
Technical Support: http://www.xilinx.com/support
Xilinx User Community: http://forums.xilinx.com
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va87
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Registered: ‎06-17-2008

Yes, thanks,

I try to do the example "rgb2gray", I've made all the instructions, but i want to connect my pcore with FSL links. So, in the EDK processor, i've checked the option "FSL". Then, I've created an EDK project in XPS, I've added my softwares, created the FSL links, but I always have 0 for the output! and I don't understand why! Can you help me? I enclose my C files and a print of my terminal,

Thank you!

print.JPG
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mjtw
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Registered: ‎07-04-2008
Just one thing. did you use "configure coprocessor"  in the hardware menu from EDK? If you haven't, try it.
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va87
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Registered: ‎06-17-2008

Hi,

  Thank you, in fact, it works using configure coprocessor. My error was I used the create peripheral tool and then, I try to integrate my core... and it's easier because I just have to copy the directory of my pcore generated by SysGen in the directory pcores of EDK...

View solution in original post

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anusharanga
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Registered: ‎07-21-2008
in the example ur discussing if suppose i ahev taken an fractional values like red 1.134356366, green 2.5.8999, blue 2.989845, how can i process? In this example variables are not n array if suppose can i procees in the form of array? please tell me  Iam eagerly waiting for ur reply
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va87
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Registered: ‎06-17-2008

Hi!

  If I understand what you want to say, you want to obtain fractional values in your terminal... I'm not an expert, but I think it's impossible. Open a new discussion in the forum about the format of your data.

If you want to contact me about this example, send me a message.

Thanks

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anusharanga
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Registered: ‎07-21-2008
can u explain how to pass a values in an array instead of passing the values in a for loop for  r,g ,b  values . If i passing array of values is it required fifo coan u please explain this issue
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anusharanga
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Registered: ‎07-21-2008

I  Got an error when iam doing the core connecting in EDK The  FSL_core in above said example is taken , i use the option configure coproccesor also it seems to be reading gives an error only any connections I have to change or again import peripheral sholuld be used please give me any soltion

Thank you

 

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