FIR performs the multiply and add operation, therefore your output width depends on the 'filter coefficient' width and "input singal" width.
You can check the full scale width for the above values in the FIR IP as well. It will give you both the total width and the fractional width. Based on fractional width, we can decide the total number of bits. For example if total output width is 12 and fraction width is 7. Then we can set total width from 5 (i.e. no decimal after rounding) to 12 (i.e. full scale output)
/ 7\7 Meher Krishna Patel, PhD
\ \ Senior Product Application Engineer, Xilinx
/ /
\_\/\7 It is not so much that you are within the cosmos as that the cosmos is within you...