02-23-2021 03:13 AM
hi,
I am trying to do hardware software co-simulation using ZCU 102 zynq ultrascale board. I am able to generate hardware software co-sim block as shown below:
but when I add add this block to simulink and try to run i get the following error:
it tells that "could not find device". but i connected the FPGA board with PC through JTAG.
How can I solve this issue>
Thanks
03-02-2021 08:26 PM
Hi,
This board has an issue with JTAG connection in Sysgen, this is known issue. In the latest Vivado releases we stopped supporting HW cosim for this board as the team wants to revamp the flow for all the boards in the coming releases, it will take some time. I hope this helps
02-23-2021 08:53 PM
Hi,
It seems like the Hardware is not connected to PC through JTAG properly. Before simulating the HW cosim library block, make sure the hardware is properly connected to the machine through JTAG. You can do so using Vivado Hardware manager wizard. If the connection is established this error will go away
Hope this helps
Regards,
Raju A.
02-23-2021 11:25 PM
Hi @ravidapu ,
Thanks for your response.
I connected the hardware properly. I also go to hardware manager manually to connect as shown below:
But when I am running the simulation, same error is coming.
02-23-2021 11:39 PM
Hi, @ravidapu
I just find out that part number of zcu102 board shown in system generator token and hwcosim block has a difference of one alphabet , shown in below images:
Is this a reason for error?
02-25-2021 08:13 PM
Hi,
Yes, that is the actual issue but I am wondering why the parts are different, are you using the zcu102 evaluation board only ? Please make sure you are using correct board
I can also confirm that the part in sysgen for zcu102 evaluation board is correct, you can check the same in Vivado as well
Hope this helps
Regards,
Raju A.
02-25-2021 09:16 PM
Hi @ravidapu
yes I am using ZCU102 board, image of board is shown below:
in the vivado project generated from system generator during hardware software cosimulation , it is showing the part no shown in below image.
and also I have generated many vivado projects from system generator for the same board and they run on zcu 102 board. issue is only coming when using hardware software cosimulation.
What could be possible reason?
03-02-2021 08:26 PM
Hi,
This board has an issue with JTAG connection in Sysgen, this is known issue. In the latest Vivado releases we stopped supporting HW cosim for this board as the team wants to revamp the flow for all the boards in the coming releases, it will take some time. I hope this helps