02-25-2019 09:34 PM
We are working on our project (Interplation and decimation for Multirate singal processing using FPGA).For the above purpose we have been using the following products:-
Also we are using the Vivado Design Suite:- 30 day evaluation license
We have been using Xilink blockset in Matlab simulink to design a circuit with the following blocks:-
Input Discrete Sine wave
A circuit was designed and executed using these blocks. No error was recieved as such but the scope failed to show any signs of output too. Tried changing all the parameters of the blocks too,result still the same. Can this be because of a licensing error?or does certain blocks have different licensing period.
Kindly help us with the query,
03-01-2019 09:26 AM
The issue is not related to license.
Note that, you need to connect the scope with the output of the "GATEWAY OUT" port.
If this does not work, then can you please share the design (or screenshot of the design).
03-04-2019 08:41 PM
Thank you for the previous reply,
My problem is still not resolved though. GATEWAYOUT was already connected to the scope,yet no output was shown. Below attached is the circuit which we are working on. Kindly help us with the same. The output in the scope is still not visible.
03-04-2019 10:59 PM
Hi @onasvi_singh ,
Can you please debug the design by probing the output on sope at each block in the design, this way it can provide you an idea if there is an issue with output of a block in the design.