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Registered: ‎10-11-2011

FFT block not compiling for spartan 6,error in xflow global placement

Hi all. I am trying to compile my design for hardware cosim with Atlys Spartan 6 board (xc6slx54-2csg324).I have ISE 12.3 installed along with Matlab 2010b on my Windows 7 64 bit machine. However during compilation, the process gets stuck at global placement. When i click on cancel, i get an error message saying

"An unknown error was encountered while compiling the design for hardware co-simulation".

This only happens when i insert a FFT v7.1 or FFT v8.0 block in my design. Otherwise hardware co sim works well. I have attached my design file. Please suggest any solution.

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Xilinx Employee
Xilinx Employee
Registered: ‎08-01-2007

As you pointed out, the design is failing during the implemenation stage.  In order to properly diagnose this you will need to look at the xflow log files in the target directory.


This will help you find the problem.  I could be that by adding the FFT, that the design no longer fits on the target part.

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