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Visitor
Visitor
823 Views
Registered: ‎04-19-2018

FIR Compiler coefficient reload

Hi,

Trying to get externally reload coefficients into an FIR. The FIR is single channel, 2 paths (I,Q), decimation (by 10), 100 taps (16 bit), clock = 80MHz, input rate = 5MHz. Pretty basic...

I've checked the 'Use reloadable coefficients' on the Filter options tab to get the reload and config ports. I'm pretty sure that the reload port is working (accepting coefficients) but the output doesn't change when I do a config port write (tdata = 0x00). I've also noticed that the output is attenuated by 8x with the 'Use reloadable coefficients' checked (regardless of trying to reload coefficients).

My test was to load a set of coefficients (all 0x0000), expecting the output to go to 0x0000.

I haven't checked or specified anything in the 'Coefficient Reload' tab. I tried specifing the same COE file (as on the Filter Options tab) to see if it might affect the 8x output attenuation but nothing happened.

FIR Compiler 7.2. I've read the documentation many times but can't find what I've missed.

Thanks in advance...

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7 Replies
Xilinx Employee
Xilinx Employee
787 Views
Registered: ‎09-18-2018

Re: FIR Compiler coefficient reload

Hi @wigwam44 ,

Can you please share the test model to check this.

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Visitor
Visitor
773 Views
Registered: ‎04-19-2018

Re: FIR Compiler coefficient reload

OK.

Not sure what you mean by 'test model'? The .xci file for the FIR?

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Xilinx Employee
Xilinx Employee
752 Views
Registered: ‎09-18-2018

Re: FIR Compiler coefficient reload

Can you please share a test bench or if possible share the design in which you are observing the issue .

 

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Visitor
Visitor
743 Views
Registered: ‎04-19-2018

Re: FIR Compiler coefficient reload

Vkanchan,

I tried sending a zip of the project but it was too big (58M) so I'll have to do something different (project just for the FIR I suppose).

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Visitor
Visitor
708 Views
Registered: ‎04-19-2018

Re: FIR Compiler coefficient reload

Vkanchan,

I don't think I can reduce the project size enough to send as an attachment. What can you recommend as an alternative?

I've attached the FIR IP, Coefficients and coefficient reload testbench in case this is helpful.

For testing reload, I used the 10 tap coefficient file just to keep the testbench simple.

 

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Xilinx Employee
Xilinx Employee
703 Views
Registered: ‎09-18-2018

Re: FIR Compiler coefficient reload

thanks for sharing . I will check and update

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Visitor
Visitor
640 Views
Registered: ‎04-19-2018

Re: FIR Compiler coefficient reload

Hi Vkanchan,

Problems solved (for now).

The issue with attenuated output had to do with bit growth and my choice of rounding. The clue was the sentence "For reloadable filters the worst case bit growth is used." in the FIR Compiler document.

The issue with reload not working seems to be due to a subtle simulation timing problem on the config valid signal. The result was that the FIR was not receiving a proper valid signal.

Thanks

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