03-05-2019 11:04 AM
I am very new to FPGA programming and I trying to implement a 24x24 bit multiplier using the DSP48E. I have looked at several Xilinx documents, but all of them only state that multipliers larger than 25x18 can be created by cascading the DSP48. I have not found any clear procedures written anywhere on how to make a cascade multiplier.
What I understand so far: I have to cascade the DSP48E using the PCOUT and PCIN >> 17 ports. Bit select the partial products and form my final product.
Can someone give me an example of how to create a multiplier by cascading DSP48E?
Some of the documentations I have read:
(around page 70)
(around page 18 )
Thank you in advance,
03-05-2019 11:28 AM