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jwu_123
Newbie
Newbie
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Registered: ‎03-05-2019

How to cascade multiplier using DSP48E

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Hello,

I am very new to FPGA programming and I trying to implement a 24x24 bit multiplier using the DSP48E. I have looked at several Xilinx documents, but all of them only state that multipliers larger than 25x18 can be created by cascading the DSP48. I have not found any clear procedures written anywhere on how to make a cascade multiplier.

What I understand so far: I have to cascade the DSP48E using the PCOUT and PCIN >> 17 ports. Bit select the partial products and form my final product.

Can someone give me an example of how to create a multiplier by cascading DSP48E?

Some of the documentations I have read:

https://www.xilinx.com/support/documentation/user_guides/ug193.pdf

(around page 70)

https://www.xilinx.com/support/documentation/user_guides/ug479_7Series_DSP48E1.pdf

(around page 18 )

Thank you in advance,

 

Jason

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drjohnsmith
Teacher
Teacher
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Registered: ‎07-09-2009
this might help
https://www.edaboard.com/showthread.php?276998-Combining-multipliers-to-make-larger-multiplier

basically you need to know how to do it mathamaticaly, then you can do it in the rtl.
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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jwu_123
Newbie
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Registered: ‎03-05-2019
Wow, I wish I knew that existed, thanks for pointing it out!
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