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Newbie
Newbie
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Registered: ‎12-13-2017

How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

Hello everyone,

 

do you know how to program a moving average filter in FPGA using blockset of Xilinx in Simulink? The FPGA frequency is 100MHz and ADC frequency is 10MHz. I want to program the moving average filter using blockset of Xilinx in Simulink. It is located after ADC.

I have tried but failed. If anyone knows, i will really appreciate for it. Thanks a lot in advance.

 

Jackie

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Scholar
Scholar
4,294 Views
Registered: ‎05-21-2015

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

@jackie321,

Well ... this isn't a Xilinx or Simulink blockset, but I think you might find this reference and the code that comes with it valuable in your quest,

 

Dan

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

@jackie321,

You can use above link suggested by @dgisselq and use blackbox feature to import RTL code in sysen design

Thanks and Regards
Balkrishan
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Registered: ‎12-13-2017

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

Hi Dan,

Thanks so much for your help.

I have one more question: Do you know how to compensate a const error in the digital filter? I mean, after the moving average filter there is always a constant error. For example, the average value of the input signal for the moving average filter is always a const as error. Do you know how to fix it?

Thanks
Jackie
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Registered: ‎12-13-2017

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

Hi Balkrishan,

I have one more question: Do you know how to compensate a const error in the digital filter? I mean, after the moving average filter there is always a constant error. For example, the average value of the input signal for the moving average filter is always a const as error. Do you know how to fix it?


As i have said, do you have any advice?

Thanks
Jackie
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Scholar
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Registered: ‎05-21-2015

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

@jackie321,

 

Not sure I understand.  If you implement a moving average filter properly, sending a zero input into the filter will (eventually) result in a zero output.  What constant error are you talking about?

 

Dan

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Registered: ‎02-28-2011

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

There are a lot of ways to implement a moving average filter in Sysgen.

 

I recommend the following way which has a periodic reset and as such removes continues errors:

 

Use a Dual Port RAM with input A for write with write enable at the rate of your desired signal.

Use Port B for read at the your FPGA system rate which should be higher than the number of points in the Dual port RAM.

start the read control after writing a new sample into the DUAL Port RAM. You can easily accumaulate the values using an addsub with 1 reguster feedback. use that register to reset the "accumulator" you build that way then divide by the number if samples you expect to get the result. Powers of 2 are best here as that makes best use of the ressources and your divider becomes a simply shift operation.

using this method you can use the write enable of the DUAL PORT RAM as a clock enable and your filter speed i variable (as long as your read rate is at least number of samples faster than your write)

This filter can easily be used for multiple inputs and outputs with a bit of logic around it.

 

If you have a fixed sample rate you can simply build and accumulator at the sameple rate and subtract the input signal delayed by the number of samples.

 

Regards Markus

 

 

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Registered: ‎12-13-2017

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

Hi Markus,

 

before i have programmed moving average filter sucessfully. Thanks for your advice!

Now i have one more question, do you know how to program a simple low pass filter in FPGA using blockset of Xilinx in Simulink? Because in the experiment there are so many noise with high frequency. 

I have found that the block "FIR Compiler 5.0" maybe work, but i don't know how to set up such as the cutoff frequency is 10kHz. Do you know how to use this block or do you have any other good idea to program a simple low pass filter in FPGA?

 

Thanks a lot.

Jackie

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Registered: ‎05-21-2015

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

A good reference for building a lowpass filter in an FPGA?  How about this one?  It discusses the basics of filtering, how to go about generating taps, and even shows how to implement a basic FIR filter.  Depending upon your application, you might find this alternate implementation better for your needs.  There's also a really cheap, really simple, single pole IIR filtering implementation that works as a crude lowpass filter.  Sometimes that meets my requirements--particularly when I'm building control systems.

 

You'll find those two articles are part of a longer series on digital signal processing within FPGAs.  If you are interested, you can find links to all of the DSP related articles here.

 

Dan

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Registered: ‎05-21-2015

Re: How to program a moving average filter in FPGA using blockset of Xilinx in Simulink

@jackie321, tag!  See above if you are interested in more information on lowpass filtering.

 

Dan

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