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Observer
Observer
815 Views
Registered: ‎05-17-2018

IP simulation problem in VCS (Synopsys)

Hi!

I've got a problem with simulating Xilinx Fast Fourier Transform v9.1 IP using VCS. There is no data on the output AXIS interface.
It works correctly with Vivado simulator IP. I have attached IP and Vivado native testbench.

VCS version Q-2020.03
Vivado version 2018.3

According to information in the release notes for Vivado 2018.3 (UG973 December 14, 2018) VCS N-2017.12-SP2 and above are supported.

 

 

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Observer
Observer
680 Views
Registered: ‎05-17-2018

Upd: IP simulates correctly using VCS 2017.12.

Xilinx employees, please verify the compatibility of Fast Fourier Transform IP with modern versions of VCS.

Also, I consider it makes sense to solve this problem together with:

https://forums.xilinx.com/t5/Xilinx-IP-Catalog/Compatibility-FIFO-Generator-v13-2-with-VCS-2020-03/td-p/1140362

 

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