07-29-2019 06:02 AM
I am looking at the best performance that I can get for a 18x18 signed multiplier on Kintex-1 device.
On that documentation [ https://www.xilinx.com/support/documentation/ip_documentation/ru/mult-gen.html ] Xilinx claims that the IP should run at 866Mhz:
|xcku13p||ffve900||-1||kup_1_dsp_18x18||Parallel_Multiplier||Signed||18||Signed||18||Use_Mults||Speed||35||0||3||CLK||866||0||0||1||0||0||PRODUCTION 1.23 03-18-2019|
But on the kintex datasheet [ https://www.xilinx.com/support/documentation/data_sheets/ds922-kintex-ultrascale-plus.pdf page 35 ] it seems to me that the DSP cannot run faster than 645Mhz
What value should I consider and why?
Thanks a lot
07-30-2019 07:48 AM
It's true that they don't match, but even the lower figure of 645 MHz will be insanely difficult to reach in a real design. The purpose of the high speed on the DSP48 is not to run at those speeds, but to NOT be the bottleneck for larger designs that use the DSP48. You will find that in real world designs, the DSP48 speed doesn't matter, as long as there is enough pipelining enabled. Of course, in IIR filter designs, the DSP48 is very likely to be a bottleneck, because of the feedback path.
07-30-2019 07:59 AM
I am interrested in simple FIR designs.
If the true speed of the DSP is 866Mhz I can hope to have a FIR working at 600Mhz
If the true speed of the DSP is 645Mhz then it will never work at 600 Mhz
That is why I ask the question