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Observer flosch
Observer
3,898 Views
Registered: ‎11-14-2012

Output Bug in FIR Compiler v5?

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I am using FIR Compiler v5 and it seems to me that there are discrepancies in the FullPrecision Output when using symmetric or not-symmetric filter architecture. Here is my FIR Compiler config:

Screenshot - 01212013 - 11:52:14 AM.png

When I choose not-symmetric, the output is as desired: Width:33 and Fractional Width: 15 --> scalarized correctly

When I choose inferred/symmetric (I checked the .coe file, the coefficients *are* symmetric) the binary point seemed to be left-shifted by one bit: Width 33: and Fractional Width: 16 --> after a left-shift, it is scalarized as desired (in my evaluation testscript, what expects a fractional length of 15)

 

Whether the FIR Filter is symmetric or not-symmetric must not make any difference in the position of the binary point of the output, must it?

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Observer flosch
Observer
4,178 Views
Registered: ‎11-14-2012

Re: Output Bug in FIR Compiler v5?

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In order to finalise my monolog here, I found the "solution". I deactived the CE (clock enable) signal of the respective FIR Compiler IP Core and suddenly it works. Don't know what it was exactly about because the CE was enabled all the time in my testbench.

View solution in original post

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4 Replies
Observer flosch
Observer
3,881 Views
Registered: ‎11-14-2012

Re: Output Bug in FIR Compiler v5?

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any thoughts?

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Observer flosch
Observer
3,867 Views
Registered: ‎11-14-2012

Re: Output Bug in FIR Compiler v5?

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Has anybody observed any differences in choosing symmetric and non-symmetric? I just saw that there is not always a difference of exact 1 bit but also little more output than the input. For instance, if I have a full-scale 16-bit signed input, I will get an output that is slightly above the 32767 which yields an overflow in my logic. I normalized the coefficient so that the max gain is 0db (also considering ripples)

In contrast, with non-symmetric the scaling of the output is fine!

 

I would appreciate if anybody could check if this issue and choose both options.

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Observer flosch
Observer
3,822 Views
Registered: ‎11-14-2012

Re: Output Bug in FIR Compiler v5?

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Sorry for pushing up this thread again.

I still have this weird behaviour with the symmetric filter structure setting. For instance, creating a narrow bandstop filter with stopband suppression of -60 dB and symmetric structure yields NO suppression at 3 MHz, so 0 dB.

Setting the filters structure of the IP core (FIR Compiler v5) to non-symmetric structure, everything fine - frequencies around 3 MHz are being suppressed by -60 dB.

 

Is it a bug? Can anybody confirm?

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Observer flosch
Observer
4,179 Views
Registered: ‎11-14-2012

Re: Output Bug in FIR Compiler v5?

Jump to solution

In order to finalise my monolog here, I found the "solution". I deactived the CE (clock enable) signal of the respective FIR Compiler IP Core and suddenly it works. Don't know what it was exactly about because the CE was enabled all the time in my testbench.

View solution in original post

0 Kudos