01-14-2011 04:28 AM - edited 01-14-2011 04:29 AM
01-14-2011 06:45 AM
Well, that´s part of my question, I don´t know how I should set up the input and output blocks correctly.
I´ve put it (and the Cordic Divider Block) as unsigned but I don´t get the proper result.
01-20-2011 03:18 AM
You just need to run the simulation longer. Note the "Z-31" on the Cordic block, which indicates the latency of the block is 31 clock cycles, so the simulation needs to longer than that to see the valid output. If you change the sim time from 10 to 100, you will see the correct result.
Hello, I´m looking for a divider to use in System Generator.
How can get 1/1 = 1?
Thank you for your help!
01-20-2011 08:57 AM
I´ve gotten to do 1/1 = 1. The parameter configuration for the CORDIC blocks is
Number of Processing Elements:1
Binary Point Position:14
Latency for each Processing Element : default
The parameters for the two Gateway in blocks are:
Output type: Unsigned
Number of bits: 16
Binary point: 14
Thank you for your response but it should be contain some error...
See the picture below, the latency of the Cordic Block is 21 and the sim time is 10. So is apparenty is incorrec to afirm that the sim time it has to be higher than the latency of the block to get the proper output result.
Thank you for your attention.
01-20-2011 09:33 AM
It may work for 1/1, but may not work for all input values. As an exercise for you: try change y inpt to 0.5 and see what you get. The point I'm trying to make is that if the latency of the block is 21, you may get the "right" result earlier, but that's not a valid result. You may also want to read about how CORDIC works before using the CORDIC divider.
01-20-2011 03:22 PM
01-27-2011 09:41 AM
02-02-2011 01:41 AM
Well, I get 1/1 = 1. The parameters configuration are:
Number of Processing Elements: 1
X,Y Data Width: 16
X, Y, Binary Point Position: 14
Latency for each Processing Element :
[1 1 1 1 1 1 1 1 1 1 1 ]
But now, I don´t get 0.1/0.2 = 0.5
What can I do it?
Thank you for your help.
02-03-2011 04:14 AM
Let me say this for the third time (and last time): go back to your orignal model (which is attached to your first message of this thread) and run simulation longer than the latency displayed for the Cordic block.