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curtisra
Observer
Observer
444 Views
Registered: ‎08-31-2016

Simulating a Simulink Subfunction in Questa

Hello,

I am looking for an example of the files I need to generate in order to simulate a System Generator Subfunction in Mentor Graphics Questa simulator.

I have tried generating an hdl_netlist from System Generator using the system generator block.  Vivado completes and there is an hdl netlist directory, but I am not sure which files are required.

An example would be helpful if available.

Thanks for any help you can offer.

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vkanchan
Xilinx Employee
Xilinx Employee
336 Views
Registered: ‎09-18-2018

Hi @curtisra ,

When a netlist is generated in System generator, it automatically creates a Vivado project in the hdl_netlist directory.

Open the project in Vivado, configure the simulator settings to Questa sim and simulate.

For details on how to simulate a Vivado project using Questa, please have a look at below links:

https://www.xilinx.com/video/hardware/simulating-mentor-questa-in-vivado.html

https://www.xilinx.com/content/dam/xilinx/support/documentation/sw_manuals/xilinx2019_2/ug900-vivado-logic-simulation.pdf

 

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