03-03-2009 08:48 AM
Hi all,
We upgraded SysGen (and ISE) from 9.2 to 10.1 SP3 and I have a dramatic increase of my simulation time.
With 9.2, the Xilinx block initialization was made one time at the
begining and only modified parts was re-initialized for next
simulation. That was allowing quick simulation, modification and
re-simulation.
But now, SysGen initialize the whole scheme every time, taking about 10 minutes on each simulation just for this.
I looked for an option to make it not initializing every thing, but I didn't find it. Any idea?
Thanks a lot!
03-10-2009 07:07 PM
03-06-2009 02:37 AM
Some news concerning my problem:
I read in the "getting started guide" about two environment variables: SYSGEN_CACHE_SIZE and SYSGEN_CACHE_ENTRIES
But those are not defined in my windows, so I created them,with values 500 and 20000 .
No change concerning simulation time: SysGen always initialize all blocks each time I launch a simulation. :smileysad:
03-09-2009 01:28 AM
I am not aware of any option that can do this.
Can you please open a web-case at http://www.xilinx.com/support/clearexpress/websupport.htm for this problem?
03-09-2009 08:24 AM
03-10-2009 07:07 PM
01-09-2010 08:09 PM
I have the same problem when initializing DSP48E Block in 10.1.
Is it actually solved in 11.1?
If I updata to 11.1, will the simulation time decrease even if I don't use DSP48E?
01-12-2010 12:16 AM
Hi
The problem was still present after upgrading to 11.1.
But I discovered that it was due to cache from old versions.
The solution is to delete all cache / temp sysgen directories in (for windows) Local settings and Application data
After clearing those folders simulation is fast and block initialise only one time
Hope this help
François