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Visitor
Visitor
5,031 Views
Registered: ‎06-03-2008

System Generator FFT v4.1 Scaling

I want to scale FFT data by 1/N, but I don't understand how to interpret the information in the help file:

 

scale_sch
provides the scaling schedule to be used for the input data frame. The scale_sch port is available only for Fixed Point Scaled mode. The signal driving scale_sch must be unsigned signal of width S with binary point at 0, where, S = 2 * log2N, for Radix-2 architectures, 2 * ceil(log2N/2), otherwise
  

 

I ran the attached model without scaling and compared its output values to ouputs from the scaled versions. Based on an example I found, I got lucky and was able to implement a model in which N=8. The system forced me to set the binary width of scale_sch to S=4. When I set the scale value to 6, the FFT data was divided by 8 as a desired. However, if I set the scale value to 7, the FFT data was scaled by 16. Unfortunatley, I don't understand how either of the scale factors related to the FFT's produced output.

 

I would like to understand the functional relationship, so that I can use a 1024 point FFT. For  reasons I didn't understand, when I changed N=1024, the system still required that the binary width of scale_sch to be S=4. 

 

Can anyone shed light on how to set the proper binary width and utilize scale_sch ?

 

Thanks

 

 

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3 Replies
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Xilinx Employee
Xilinx Employee
5,008 Views
Registered: ‎11-28-2007

Re: System Generator FFT v4.1 Scaling

If you go to the very bottom of the help page for FFT core in System Generator, you will see that the SysGen FFT block uses CoreGen FFT core under the hood. You can click the link to open the PDF data sheet the CoreGen FFT core, which describes the scaling schedule in more details.Basically, the scale_sch is broken into 2-bit group and depending on the operation mode, each 2-bit affects the scaling for 1 or 2 stages.

 

Cheers,

Jim

Cheers,
Jim
ScreenHunter_01 Jan. 25 17.54.gif
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Highlighted
2,420 Views
Registered: ‎09-22-2011

Re: System Generator FFT v4.1 Scaling

The signal driving xn_re can be a signed data type of width S with binary point at S-1. 

But i must use

 xn_re=[2,  1.5,  1, 0, 0,  -1,  -1.5,-2];

xn_im=[2,  1.5,  1, 0, 0,  -1,  -1.5,-2];

 

What can i do ?

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Xilinx Employee
Xilinx Employee
2,413 Views
Registered: ‎11-28-2007

Re: System Generator FFT v4.1 Scaling

You can use the "Reinterp" block for force the binary point to be S-1 and then connect the Reinterp output to the FFT block.


@zhaozhong0629 wrote:

The signal driving xn_re can be a signed data type of width S with binary point at S-1. 

But i must use

 xn_re=[2,  1.5,  1, 0, 0,  -1,  -1.5,-2];

xn_im=[2,  1.5,  1, 0, 0,  -1,  -1.5,-2];

 

What can i do ?




Cheers,
Jim
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