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Contributor
Contributor
440 Views
Registered: ‎01-08-2014

System Generator block AXI FIFO have bug ...

Hi,

I installed Vivado 2019.2 with DSP Tools and was starting to get familiar with System Generator. I then created a simple model using the AXI FIFO block.

AXI FIFO reference.png

Send the "reset" signal to the AXI FIFO block for 100 clock cycles.

At the input of the AXI FIFO I write with an 8-bit counter incremented by the "in tready" signal.

At the output I take the data continuously, leaving "out tready" at "1" constantly.

In another test I leave "out tready" at "0" constantly.

If you run a simulation longer than 65535 clock cycles you notice a problem exactly at the 65536 cycle, the "data count" goes to "0" as if AXI FIFO was reset by something internally.

What appears most strange is that it always happens at the 65536 clock cycle, even leaving the "out tready" signal fixed at the value "0".

"out tready" to "1" constantly:

AXI FIFO Waveform - out tready fixed 1.png

"out tready" to "0" constantly:

AXI FIFO Waveform - out tready fixed 0.png

Is there a problem with this block ?

I have attached the complete model if someone else wants to try, to get another feedback.

Thanks very much.

moreasm

5 Replies
Contributor
Contributor
380 Views
Registered: ‎01-08-2014

Re: System Generator block AXI FIFO have bug ...

Hi,

no one had the same problem ?

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Xilinx Employee
Xilinx Employee
336 Views
Registered: ‎09-18-2018

Re: System Generator block AXI FIFO have bug ...

Hi @moreasm ,

Thanks for sharing the script. I will check this and let you know.

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Highlighted
Contributor
Contributor
291 Views
Registered: ‎01-08-2014

Re: System Generator block AXI FIFO have bug ...

Have you got to try it? Are there any news?

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Xilinx Employee
Xilinx Employee
163 Views
Registered: ‎09-18-2018

Re: System Generator block AXI FIFO have bug ...

Hi @moreasm ,

 

This is identified as a bug in the AXI FIFO block and it will be fixed in the next release of Vivado Sysgen.

Contributor
Contributor
151 Views
Registered: ‎01-08-2014

Re: System Generator block AXI FIFO have bug ...

Hi vkanchan,

I'm sorry this bug is present, but I'm glad it will be fixed.

Has been released Vivado 2019.02, so the resolution of the bug will happen with version 2019.03 ?

Thanks very much.

moreasm

 

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