UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor inventor_1
Visitor
265 Views
Registered: ‎07-16-2018

System generator for DSP- Float point mult - use AXI4-stream interface

Hi!

1.how can I use the signals of the AXI-stream interface (for example _tvalid) on the float point mult block in the model?

2.how can i manage the amount of dsp slice used in a float point mult block?

0 Kudos
1 Reply
Adventurer
Adventurer
226 Views
Registered: ‎12-16-2018

Re: System generator for DSP- Float point mult - use AXI4-stream interface

Hi 

1)The mult block under the math tab in sysgen don't have a AXI Stream Interface. You can add a couple AXI FIFO blocks to you design and then implement the AXI Stream Interface. 

2) To control the number of XtremeDSP slice ( DSP 48) that you are using, just disable the option: Use embedded multipliers, under the Implementation tab in the Mult control window, this option is set by default and specifies that if possible, use the DSP48 blocks in the FPGA.

I hope that this information was useful to you.

0 Kudos