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Newbie priamo
Newbie
11,919 Views
Registered: ‎10-22-2007

Thanks for the answer that you give me on the use of the...

Thanks for the answer that you give me on the use of the embedded multipliers (18*18 bit) in the FIR filter but now I have another problems.
I must implement a FIR filter with variable coefficient always using embedded multipliers (18*18 bit) contain in the virtex 2PRO vp 100.
Can I still use the DSP tool Xilink Blockset to do this?
 
Thanks 
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6 Replies
Explorer
Explorer
11,900 Views
Registered: ‎08-14-2007

Re: Thanks for the answer that you give me on the use of the...

I think so. At least, there's no problem in Core Generator.
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Visitor vamsidhars
Visitor
11,683 Views
Registered: ‎01-15-2008

Plz help in using VSK

Hello,
Im new to using these FPGAs. I have a Video starter kit with ML402 board and VIODC. I downloaded the VSK stand alone reference design[http://www.xilinx.com/products/devboards/reference_design/VSK_StandAlone_91.zip] and compiled it using sysgen 9.1 and burnt it on the board. I used the drop down menus and set the following options:
compile type : BITSTREAM
input : LVDS camera
output : VGA

It compiled succesfully and i regenerated the bitstream after placing the ucf file.[as suggested in the readme.txt].... But no output was found on the monitor. But the switches and LEDS were working properly. Then I routed the output of the camera to LEDs and the LEDs were glowing arbitrarily, which the input part is correct. But as soon as I connect the VGA monitor, the LEDs stop changing. They come to a still.

I dont understand what was going, Plz help me out.......

vamsidhar
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Xilinx Employee
Xilinx Employee
11,670 Views
Registered: ‎08-01-2007

Re: Plz help in using VSK

There are multiple outputs on the VSK.

1. VGA output on the ML402.
2.  VGA output using the DVI to VGA adaptor.

I would recommend that you try both.
Chris
Video Design Hub | Embedded SW Support

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Visitor vamsidhars
Visitor
11,662 Views
Registered: ‎01-15-2008

Re: Plz help in using VSK

yes i tried both of them.....
These are the steps i followed..... first downloded the vsk_stand_alone91 design
opened it with matlab with sysgen9.1 installed....
i opened the sysgen block by double clicking it... set the compilation to bitstream...
where there were forms to give the location of "balanced.opt" & "bitgen.opt"
i set it to C://Xilinx91/Xilinx/data/balanced.opt and same location for bitgen....
then compiled it.... it gave many errors so i set an environment variable as given on
http://www.xilinx.com/support/answers/24292.htm

and it compiled succesfully and then i regenerated it by placing the ucf file by changing its name properly...

i took the bitfile gool_cw.bit and used the system ace program given on the site.. and viodc_wrapper11b.bit as a wrapper file and generated the ace file...
http://www.xilinx.com/products/devboards/reference_design/vsk_system_ace.zip

ml40xbit2ace gool_cw.bit viodc_wrapper11b.bit test.ace

then i followed the instuctions of the word document present in the vsk_system_ace.....

set the ace address 100 [asking it to start from 4 where i placed i the ace file]

...NO error led is on.... and the LEDs and switches are respectively connected like north LED to north GP button... and they are glowing if i press the buttons.... but i cannot see any output on the monitor... in the readme.txt in the vsk_stand_alone it is written that the VGA is of VIODC... though i tried both of them... no result... :(....

plz if u can compile the design as it is on ur board,.,.. plz tell me.....
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Visitor vamsidhars
Visitor
11,584 Views
Registered: ‎01-15-2008

Re: Plz help in using VSK

Bingo buddies....

The problem is solved... On he system generator options the fpga clock period should be set 50ns instead of the default value of 10 ns....
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Visitor vamsidhars
Visitor
11,501 Views
Registered: ‎01-15-2008

Re: Plz help in using VSK

use viodc_wrpper12 instead of 11b , we tested it.....and it worked...
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