UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor erochasousa
Visitor
3,346 Views
Registered: ‎10-14-2009

Using multi-column support with Spartan 3400A

Hello, 

 

I am having some problems about using the FIR Compiler multi-column support in Spartan3400A.

 

I downloaded the Spartan3 and FIR Compiler user guides, but both aren't enough specific on how to configure the following:

 

First Column Length 

Column Wrap Length

 

Ok, here's my problem:

 

I want to design a FIR filter with hardware-over-sampling rate of 4. And I want to use the 3 central columns of spartan3400A DSP. Each central column has 26 DSP48 slices.

 

When I use this configuration (only one column)

 

 

Filter Length= (26-1)*4 

Hardware over sampling rate = 4 

First Column Length   = 26

Column Wrap Length = 26


 

There's no errors.

 

But when I try to use the 3 larger columns:

 

Filter Length= (26*3-1)*4 

Hardware over sampling rate = 4 

First Column Length   = 26

Column Wrap Length = 26*3

 

A "standard exception" is raised.

 

Well, there's some detail  about the First Column and Column Wrap lengths that I'm skipping.

 

I want to find a mathematical equation that gives me the Filter Length from these other 3 inputs:

 

Hardware over sampling rate (hosr)

First Column Length (fcl)

Column Wrap Length (cwl)

 

when fcl=cwl=26,

 

F_length = (cwl-1)*hosr  (works)  *(1)

 

If  fcl=26 and cwl=26*3 ,  I'm trying:

 

F_length = (cwl-1)*hosr (not works)

 

*(1) The "minus one" saves space for the accumulator.

 

Thanks everyone, and sorry if this post was too long. 

0 Kudos