Versal ACAP AI Engine (AIE) - Useful Resources

[florentw]

Versal ACAP AI Engine (AIE) - Useful Resources

This post lists the useful resources related to the Versal ACAP AI Engine (AIE)

---

Summary

1. Documentation Resources
2. Example Designs/Applications
3. Blog Articles
4. Main Answer Records

---

1. Documentation Resources

AI Engine Design Process Hub

The Versal ACAP AI Engine Design Process Hub can help you find the documentation resources you need base on your current development stage:

https://www.xilinx.com/support/documentation-navigation/design-process/ai-engine-development.html 

Main Versal AI Engine Documents

This is the list of the main documents for AI Engine Development:

AM009 - Versal ACAP AI Engine - Architecture Manual

UG1076 - Versal ACAP AI Engine Programming Environment (HTML Version) - (PDF Version)

UG1078 - Versal ACAP AI Engine Intrinsics

UG1273 - Versal ACAP Design Guide

---

2. Example Designs/Applications and tutorials

LeNet Tutorial

Super Sampling Rate FIR Filters

A to Z Bare-metal Flow

Using GMIO with AIE

Runtime Parameter Reconfiguration

Packet Switching

AI Engine Versal Integration for Hardware Emulation and Hardware

Versal System Design Clocking

---

3. Blog Articles

Versal ACAP AI Engines for Dummies

Xilinx Versal AI Engine Series

---

4. Main Answer Records

AR#75837 - Xilinx AI Engine Solution Center

AR#75675 - LogiCORE AI Engine IP - Release Notes and Known Issues for the Vivado 2020.2 tool and later versions

AR#75790 - AIE Compiler - General Guidance and Known Issues for the Vitis 2020.2 tool and later versions

AR#75788 - AIE Simulator - General Guidance and Known Issues for the Vitis 2020.2 tool and later versions

AR#75802 - DSP Library (DSPLib) for AI Engine - Release Notes and Known issues