09-11-2020 12:00 AM
Hi to all
I am trying to generate system generator block using Vitis HLS environment, but nothing happens. The HLS block in system generator can't find the design made in Vitis HLS.
Please help, this task is fulfilled when I use Vivado_hls
09-11-2020 05:44 AM
Thank you for bringing up this
Unfortunately, we do not have a support to import Vitis_HLS project in to Sysgen in 2020.1. Vivado HLS block in sysgen library is used to import only Vivado HLS project but not Vitis HLS project.
You will see the support in the next release
09-12-2020 11:29 PM
Hello Raju A.
As I understood Xilinx exchanged the VIVADO HLS tool by a new Vitis HLS tool in version 2020.1 without supporting it's full functionality. In my opinion based in more than 40 years of system engineering work this is absolutely unprofessional.