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Visitor
Visitor
12,656 Views
Registered: ‎09-19-2007

Xilinx FFT ip core

I am using Xilinx FFT ip core. Please guide me regarding the format of input data I need to use for the core.
How should I represent the signed and unsigned numbers.
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Xilinx Employee
Xilinx Employee
12,634 Views
Registered: ‎08-01-2007

The Xilinx FFT core only supports Singed 2's Complement numbers.

See the description of the data inputs for the core xn_re and xn_im in the datasheet.
http://www.xilinx.com/ipcenter/catalog/logicore/docs/xfft.pdf

Chris
Versal ACAP: AI Engines | Embedded SW Support

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Visitor
Visitor
12,605 Views
Registered: ‎09-19-2007

Thanks. Does that mean If my inout is 16 bits i.e D15 downto D0, D15 bit is the sign bit. How do we decide the length of integer part and the fractional part?
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