11-07-2007 05:55 AM
12-19-2013 09:22 AM
I need a up-converter code in VDHL for my research project. Can someone help me?
The interpolator can be split in two parts:
The LPF must be a FIR filtre of 15 coef. and can be implemented with Matlab tool (<fdatool)
The specifications are the next:
- sampling freq. input = 100 Ksps
- BW input = 3kHz
- system clk = 200MHz --> implement a clock system enable for 50Mhz and 100MHz
- DAC samplig freq = 50MHz
- NCO output (sin and cos) = 8 bits
- max NCO freq deviation = 0.5 Hz
- FIR filtre of 15 coef.
Thank you in advance
12-23-2013 10:49 PM