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Visitor
Visitor
10,353 Views
Registered: ‎01-02-2008

how can I know where is the location of P240_DAC_SDIO in virtex 4 board?

how can I know where is the location of P240_DAC_SDIO in virtex 4 board?
how can I pump in input at this port?
 
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Xilinx Employee
Xilinx Employee
10,345 Views
Registered: ‎08-02-2007

Which Virtex-4 board is this? 
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Visitor
Visitor
10,309 Views
Registered: ‎01-02-2008

#PART TYPE:        xc4vlx60
#SPEED GRADE:      -10
#PACKAGE:          ff668
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Visitor
Visitor
10,308 Views
Registered: ‎01-02-2008

A19

p240_adc2_in(11)
A20 p240_adc2_in(10)
A21 p240_adc2_in(9)
AA8 p240_adc2_dummy_out
AA11 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(15)
AA12 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_PHSTR
AA13 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_RESETB
AA15 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_SDIO
AA16 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_SCLK
AA17 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(6)
AA18 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(11)
AA19 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(12)
AA20 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(11)
AB18 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(2)
AB20 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(7)
AB22 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(8)
AC11 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(13)
AC12 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(14)
AC14 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(15)
AC15 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_TxENABLE
AC16 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_SDENB
AC18 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(1)
AC22 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(12)
AC23 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(10)
AC24 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(9)
AD21 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(0)
AD22 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(6)
AD23 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(2)
AE18 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(4)
AE21 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(1)
AE23 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(4)
AF7 p240_dac_dummy_out
AF8 p240_adc1_dummy_out
AF12 clk
AF18 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(0)
AF19 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/O
AF20 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/OB
AF21 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(3)
AF23 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(5)
AF24 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(9)
B20 p240_adc2_in(8)
B21 p240_adc1_in(9)
C11 p240_adc1_in(3)
C19 p240_adc2_in(12)
C21 p240_adc1_in(8)
C22 p240_adc2_in(7)
C24 p240_adc1_in(6)
D13 p240_adc1_in(2)
D14 p240_adc1_in(0)
D15 scale9_x0/adc1_p240_analog1_36b835baf1/adc1_3e6e150f38/black_box/P240_ADC1_OE
D18 p240_adc2_in(13)
D19 p240_adc2_in(3)
D21 scale9_x0/adc2_p240_analog1_6d8ebfcdd3/adc2_a2f8025a4f/black_box/P240_ADC2_OE
D22 p240_adc2_in(6)
E14 p240_adc1_in(1)
E17 p240_adc2_in(4)
E20 p240_adc1_in(13)
E21 scale9_x0/adc2_p240_analog1_6d8ebfcdd3/adc2_a2f8025a4f/black_box/P240_ADC2_RESET
H21 p240_adc1_in(11)
H22 p240_adc1_in(7)
U6 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(8)
U7 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(7)
V22 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(14)
W19 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(3)
Y17 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(5)
Y18 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DB(10)
Y21 scale9_x0/dual_dac_p240_analog2_64fb2ab6fc/black_box/P240_DAC_DA(13)

 

I connected my design to P240ADC and P240DAC in order to use P240 on the board.

I sucessfully generated hardware in the loop module.

I open the .ise file generated at ISE software and sucessfully download bit stream into FPGA.

I try to pump in inpit at ADC of P240 board but I cannt get output at DAC output.

What wrong with my process? I found that the pin assignment of clock AF12 is actually LCD pin.

What can i do to make P240 board function.

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Xilinx Employee
Xilinx Employee
10,192 Views
Registered: ‎08-07-2007

I'm not familiar with the P240 board but it would be best to start with the documenation provided with that board and any reference designs which may exist.

Keep in mind that when running hardware co-simulation signals will only be routed to actual FPGA pins in hardware if "non-memory mapped" ports or gateways are used.  Otherwise they are routed to internal logic which communicates with the hardware co-sim interface to transfer data back to the computer to the Simulink environment.
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Visitor
Visitor
10,170 Views
Registered: ‎01-02-2008

where should I set the non-memory mapped.
In the system generator token---->compilation----->hardware in the loop----->add new hardware?
or
inside gateway in and gateway out?
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Xilinx Employee
Xilinx Employee
10,153 Views
Registered: ‎08-07-2007

When you generate the board plugin files from the SysGen token using the SBD Builder tool there is a field to add non-memory mapped ports. 

For details take a look at the System Generator User Guide.
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