10-10-2020 01:09 AM
Hello I am trying to implement the example design on FFT by Xilinx available here. The example is based on ZC702 or zed board vivado 2015, and I am trying to implement it on Utlra96v2 board in vivado 2019.1. I can not get the IP updated with the part number corresponding to Ultra96 board, can anybody help with this?
Regards
Nitin Kumar
10-22-2020 08:41 AM - edited 10-22-2020 08:43 AM
You need to rewrite the software for Ultra96, because the example in the link is for SoC devices and Ultra96 has MPSoC device.
Similarly, most of the IP might not be upgraded to latest version of the Vivado as there are significant changes in the tool since 2013.
10-10-2020 03:47 AM - edited 10-10-2020 03:47 AM
10-22-2020 08:41 AM - edited 10-22-2020 08:43 AM
You need to rewrite the software for Ultra96, because the example in the link is for SoC devices and Ultra96 has MPSoC device.
Similarly, most of the IP might not be upgraded to latest version of the Vivado as there are significant changes in the tool since 2013.
10-22-2020 09:51 PM