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Visitor mehdimolu
Visitor
1,437 Views
Registered: ‎07-21-2017

implementing FIR in System generator

Hi, 

I am new to system generator (and new to FPGA world indeed).

 

I am trying to implement an FIR filter in system generator and observe the output. I am attaching the system I have implemented and the output.

I have set the filter to be halfband lowpass filter with Fs=15.36Msps, Fpass=2.5MHz and Apass=0.01dB  (parameters form Xapp1123). 

 

 However, as you can see in the scope, the out put (blue) is zero. I would appreciate if someone could help me figure out what am I missing

 

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Xilinx Employee
Xilinx Employee
1,368 Views
Registered: ‎08-02-2011

Re: implementing FIR in System generator

What's the datatype of the gateway in? What about the sample period of the gateway in, random number generator, and the simulink system period?
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