matrix multiplication

[elizash]

At first I thought that problem solved(http://forums.xilinx.com/t5/DSP-Tools/Work-with-matrix/m-p/185558#M4662) by unfortunately I was wrong 

I have two ways to solve matrix mult but both of them are not working ((

First:use SysGenblocks

It gives me wrong results.

Model attached.

May be someone have any ideas.

Second:Ip core Algebra Toolkit.

But now I have another problem.

It gives me error which can not be true :

The input ports on this block must be driven by other Xilinx blocks

Error reported by S-function 'sysgen' in 'matrixmultv/Constant1':
A summary of Sysgen errors has been written to C:/Program Files/MATLAB/R2010b/work/matrixmultv_sysgen_error.log

because all inputs are connected  and what problem with constant I don't get

My steps:

1.Made IP core :matrix 3 by 3

2.It gives me three models in one file

3.SysGen Black box do not take all modules

4.Divided on three files :multm ,matstruct,glbl

5.Make black box from main module:multm

6.And other modules in config.m

this_block.addFile('matrix/ipcore_dir/multm.v');
this_block.addFile('matrix/ipcore_dir/glbl.v');
this_block.addFile('matrix/ipcore_dir/matstruct.v');
this_block.addFile('matrix/ipcore_dir/mult.veo');
this_block.addFile('matrix/ipcore_dir/multm.vho');
this_block.addFile('matrix/ipcore_dir/multm.ngc');
this_block.addFile('matrix/ipcore_dir/multm.vhd');

On which step I made mistake?

Link to Algebra Toolkit datasheet:

http://www.xilinx.com/support/documentation/ip_documentation/linear_algebra_toolkit/v1_0/ds829_linalg_toolkit.pdf

Attached model and files.

Thanks in advance.

Eliza

[secureasm]

Hi,

missing file "remaider1_config" and "sendtomult" ... post full model to work on it.

On Black Box, you should not see the clock ports. The port "clk" and "ce" must exist, make wrapper if do not exist in vhdl/verilog. This port are used for synchronization by simulink.

secureasm

[elizash]

Sorry that I do not all files for first version

For second the clock are exists it called aclk, but i will try add "ce".That mistake appears because of absence of 'ce'? 

[secureasm]

Where is the "remaider1.v" ?

Plese search "Black Box Examples" and "Importing a Verilog Module" in Matlab Xilinx help guide and follow guide step.

secureasm

[elizash]

I have read it but I will take a look again. thanks

[secureasm]

Hi elizash,

this is new model with "ce" and "clk" pin on verilog code.

secureasm

[elizash]

Thanks secureasm,

I looked your version and it gives me XXX.XX instead of real numbers?What does it mean?

If talking about Algebra Toolkit I again have the same error!I add 'ce' .I tried with verilog and vhdl results of core error are the same I think there is a problem with importing of cores but I followed instructions in user guide examples.

The input ports on this block must be driven by other Xilinx blocks

Reported by:
'matrixmultvhdl/Black Box'

Add files in config.m 

for v:

this_block.addFile('matrix2/ipcore_dir/mult2.v');
this_block.addFile('matrix2/ipcore_dir/matstruct1.v');
this_block.addFile('matrix2/ipcore_dir/glbl2.v');
this_block.addFile('matrix2/ipcore_dir/mult.ngc');
%this_block.addFile('matrix2/ipcore_dir/');

for vhdl

this_block.addFile('matrix2/ipcore_dir/matstructvhdl.v');
this_block.addFile('matrix2/ipcore_dir/mult.ngc');
this_block.addFile('matrix2/ipcore_dir/mult.asy');
this_block.addFile('matrix2/ipcore_dir/mult.gise');
this_block.addFile('matrix2/ipcore_dir/mult.sym');
this_block.addFile('matrix2/ipcore_dir/mult.veo');
this_block.addFile('matrix2/ipcore_dir/mult.vho');
this_block.addFile('matrix2/ipcore_dir/mult.xco');
this_block.addFile('matrix2/ipcore_dir/mult.ngc');

(all existed files because already don't know what to do)

Models attached.

[secureasm]

Hi elizash,

I have no idea what to do, but before you say that does not work make sure that all input data meet the format and rate.

I have attached a model that does not error.

You have to rename "ce" and "clk" respectively, take a look the code.

I have to do your job but I want to be paid :smileyhappy: .

secureasm

[elizash]

Thank you so much!I will again!

I checked you code and played with it but gave me that!!

Thanks again:smileyhappy: