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Visitor ranvi2195
Visitor
453 Views
Registered: ‎10-04-2018

problem in implementing 8 point FFT using FFT V9.0 in system generator

I have implemented 8-point FFT using FFTv 9.0 in system generator and faced the following problem .Can anyone guide me how to rectify that error.

receiver error.PNG

 

 

I have attached the .slx and .mat file for reference.

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1 Reply
Xilinx Employee
Xilinx Employee
417 Views
Registered: ‎09-18-2018

Re: problem in implementing 8 point FFT using FFT V9.0 in system generator

Hi,

The problem is due to the configuration of the FFT IP in your design.

FFT IP core is using the Radix-4 Burst I/O architecture. The minimum transform size for this is 64, whereas the configured size is 8.

Please refer to the Sysgen flow under the Design flow steps in the PG 109.

 

FFT_size.PNG

 

Please change the Transform size to greater than 64 if Burst I/O architecture is required else if transform size of 8 is required , consider moving to Radix-2 Burst I/O architecture or Pipelined streaming architecture.

 

Regards,

Vivek

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