04-15-2021 10:52 AM
I am facing an error during build process. It seems that the build process is failing due to long path names. Following is the error
I reduced the model name size to be one character which is "A" and its folder name to have three characters. Therefore the model patch is "C:\LTE\A". The model is the same model which I used to build and I did not change any subsystem name and I did not add any subsystem.
I don't understand the reason for this error. Model path is pretty short and the model is the same as I used to build.
Do you have any idea about the solution for this problem? I am attaching Vivado log file to this post.
I would appreciate it if you let me know your opinion as soon as possible.
Thank you in advance.
04-19-2021 06:18 AM
Hi @Behrouz ,
It appears that you have blocks in your model which have long names. A block may resolve into an IP and its directory name will be same at that of the block's
Please reduce the block/subsystem names in your design and retry.
04-19-2021 10:20 AM
I could compile the same model last week. I did not add any block or subsystem to the model to increase block/subsystem path. How can this happen? It should have a reason other than the model subsystems because the model is the same model and Xilinx was able to compile the same model before.