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Teacher
Teacher
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Registered: ‎03-31-2012

using Xilinx matlab cosimulation block from matlab command line?

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Hi,

I would like to use the jtag based matlab/simulink cosimulation block from the command line in matlab to copy a file to fpga and get data back. I would like to implement my own hardware on the fpga (instead of using simulink and/or hdl coder) and call a function in matlab for data interface. Is this possible? If so what should the fpga instantiate to be able to link with the xilinx jtag server/function to connect matlab to my fpga block. Any help in this direction would be appreciated.

 

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: using Xilinx matlab cosimulation block from matlab command line?

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Hello,

 

How do I get the Sysgen black box? Is it possible to use Vivado only flow with instantiating the IP ? Or do I have to go to Matlab and instantiate it in Simulink to get the source/ip?

 

Sysgen is basically just a custom library for simulink. So if you launch it, you'll see a 'Xilinx Blockset' in the simulink library browser so you can drag Xilinx blocks into the model just like any other simulink block. The 'Black Box' block is one of them. You'll want to create a sysgen/simulink design which contains nothing but the 'Sysgen Token' and one of those 'Black Box' blocks. In sysgen/simulink, you point the 'black box' block to all of your custom HDL that you want to run hardware co-sim.

 

From here, when you generate a bitstream (literally pushbutton flow from SysGen), the tool will add necessary HDL on top of your sysgen design containing JTAG or ethernet interfacing (whichever you prefer, depending on the board you choose). This happens completely behind the scenes.

 

Now when you run the hardware co-sim (another pushbutton flow), the tool will automatically load this bitstream onto the FPGA and pass data between the FPGA and host PC through the protocol you picked.That data will be taken in and presented to the simulink environment through your top-level HDL ports from your black box.

 

What you could then do is hook up those ports on the black box to 'To Workspace' and 'From Workspace' blocks which allows the simulink model to take in and send out data to/from workspace variables. Workspace variables can be accessed by matlab scripts.

 

Sounds simple, right?! :)

 

This is documented in UG897, chapters 5-6.

 

I'd highly recommend going through the getting started labs for sysgen first (UG948), especially if you're not very familiar with simulink/matlab. The tool is fundamentally built upon matlab/simulink, so it will save you a lot of heartache in the long run to familiarize yourself with the basics first before you jump into the hardware co-sim flow + black boxing which is fairly complex.

www.xilinx.com

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: using Xilinx matlab cosimulation block from matlab command line?

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Hello,

 

ISE or Vivado?

 

You're not going to be able to totally separate from Sysgen. Conventional wisdom is to use Sysgen black box to bring in your HDL design. Then you can design everything you want in HDL and pipe the top-level ports as data to the Matlab/Simulink environment. At which point, you can script anything you want (sysgen supports interacting with the hardware co-sim with matlab API).

www.xilinx.com
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Teacher
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Re: using Xilinx matlab cosimulation block from matlab command line?

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I am using Vivado. How do I get the Sysgen black box? Is it possible to use Vivado only flow with instantiating the IP ? Or do I have to go to Matlab and instantiate it in Simulink to get the source/ip?
Also does the Sysgen block handle jtag/ethernet connectivity?
What I would like to do is add a module at top level of my HDL design and just connect my datapath's ports to it and not worry about jtag or (preferably) ethernet. Any tutorial/user guide for someone who doesn't want to get involved with matlab too much (and definitely not simulink if I can avoid it).
- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: using Xilinx matlab cosimulation block from matlab command line?

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Hello,

 

How do I get the Sysgen black box? Is it possible to use Vivado only flow with instantiating the IP ? Or do I have to go to Matlab and instantiate it in Simulink to get the source/ip?

 

Sysgen is basically just a custom library for simulink. So if you launch it, you'll see a 'Xilinx Blockset' in the simulink library browser so you can drag Xilinx blocks into the model just like any other simulink block. The 'Black Box' block is one of them. You'll want to create a sysgen/simulink design which contains nothing but the 'Sysgen Token' and one of those 'Black Box' blocks. In sysgen/simulink, you point the 'black box' block to all of your custom HDL that you want to run hardware co-sim.

 

From here, when you generate a bitstream (literally pushbutton flow from SysGen), the tool will add necessary HDL on top of your sysgen design containing JTAG or ethernet interfacing (whichever you prefer, depending on the board you choose). This happens completely behind the scenes.

 

Now when you run the hardware co-sim (another pushbutton flow), the tool will automatically load this bitstream onto the FPGA and pass data between the FPGA and host PC through the protocol you picked.That data will be taken in and presented to the simulink environment through your top-level HDL ports from your black box.

 

What you could then do is hook up those ports on the black box to 'To Workspace' and 'From Workspace' blocks which allows the simulink model to take in and send out data to/from workspace variables. Workspace variables can be accessed by matlab scripts.

 

Sounds simple, right?! :)

 

This is documented in UG897, chapters 5-6.

 

I'd highly recommend going through the getting started labs for sysgen first (UG948), especially if you're not very familiar with simulink/matlab. The tool is fundamentally built upon matlab/simulink, so it will save you a lot of heartache in the long run to familiarize yourself with the basics first before you jump into the hardware co-sim flow + black boxing which is fairly complex.

www.xilinx.com

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