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dcygan
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Registered: ‎01-17-2020

EdgeAI Eval Board Avnet Ultra96 image incorrect?

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I tried the petalinux image for Ultra96 board and it will not boot on that board v2. I hoped I could experiment with the DNNDK 3.1 and run some examples on hw DPU there but unfortunatelly something wrong with the image. On boot time SD card is used and through serial interface a putty console but it seems it will not start at all, there is nothing on the console. So I just would like to know if anyone managed to make a use of the Xilinx provided petalinux image from the link below?

https://www.xilinx.com/member/forms/download/ultra96-image-license-xef.html?filename=petalinux-user-image-ultra96-zynqmp-sd-20190802.img.gz

I just want to say that I managed to build my own petalinux image using BSP from Ultra96 and petalinux sources from Xilinx, 2019.2 peta and Vitis used. It took some time to go through the build process and complexity of correct Vitis settings but eventually.. Then the image loaded on SD card, the same hw used, the same putty console and the system was running up, I could login to my U96 petalinux.

I just think what might be wrong with the Xilinx image, anyone reported the problem? Or is it an issue on my side?

It would be a great help if that image from the link above worked as I had a DPU already integrated.

 

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dcygan
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Registered: ‎01-17-2020

Hi,

I want to finish the topic here with the conclusion that the hardware change between V1 and V2 is big enough that image for V1 will not boot up at V2.

Here is a good explanation - https://www.element14.com/community/community/designcenter/zedboardcommunity/ultra96/ultra96-v2/blog/2019/07/13/lpddr4-memory-differences-between-ultra96-v1-and-ultra96-v2

Thanks and greetings. 

 

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katsuki
Xilinx Employee
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Registered: ‎11-05-2019

 

Hello @dcygan 

 

This image is only for Ultra96v1.

 

Thanks.

Yoichi

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dcygan
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Registered: ‎01-17-2020

Thanks katsuki. Would you explain why Ultra96v1 is so different from v2 that the image there is so incompatibile? I see both use the same Xilinx Zynq UltraScale+ MPSoC device however, there is a modification for IDT clock chip, DDR micron memory upgraded..

Have you seen or tested the mentioned image on U96_v1and successful? U96_v2 was introduced just about a year ago.

 

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katsuki
Xilinx Employee
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Registered: ‎11-05-2019

 

Hello @dcygan 

 

As you pointed out, the DDR memory has changed. This affects the configuration parameters of PS-DDR.

Therefore, v1 images will not work with v2.

 

Thank you

Yoichi

 

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dcygan
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Registered: ‎01-17-2020

Hi,

I want to finish the topic here with the conclusion that the hardware change between V1 and V2 is big enough that image for V1 will not boot up at V2.

Here is a good explanation - https://www.element14.com/community/community/designcenter/zedboardcommunity/ultra96/ultra96-v2/blog/2019/07/13/lpddr4-memory-differences-between-ultra96-v1-and-ultra96-v2

Thanks and greetings. 

 

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