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f.restuccia
Visitor
Visitor
291 Views
Registered: ‎05-03-2018

Error generating the DPU hardware design

Hello Xilinx community,

I'm trying to create the hardware design of the DPU following the tutorial at: 

https://github.com/Xilinx/Vitis-AI/blob/master/dsa/DPU-TRD/prj/Vivado/README.md

I followed all the steps reported in the tutorial.

Unfortunately, when I source the project to Vivado using the command 

vivado -source scripts/trd_prj.tcl

Vivado reports the following error:

ERROR: [BD 41-1273] Error running post_config_ip TCL procedure: unexpected "," outside function argument list ::xilinx.com_ip_zynq_ultra_ps_e_3.3::post_config_ip Line 47

How can I solve the problem?

Thanks

 

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4 Replies
davidxu
Xilinx Employee
Xilinx Employee
276 Views
Registered: ‎09-11-2019

Hi @f.restuccia 

Which Vivado version do you use? 

Vivado 2020.2 is recommended.

 

Thanks

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f.restuccia
Visitor
Visitor
267 Views
Registered: ‎05-03-2018

hi @davidxu, thank you for your answer. I'm using Vivado 2020.2 as recommended running on Ubuntu 18.04 

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f.restuccia
Visitor
Visitor
178 Views
Registered: ‎05-03-2018

@davidxu I'm still having the same issue. Any hint to solve it?

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davidxu
Xilinx Employee
Xilinx Employee
164 Views
Registered: ‎09-11-2019

Hi @f.restuccia 

 

I am sorry. I cannot reproduce your issue using Vivado 2020.2 on Ubuntu 18.04.

Obviously this is not a DPU problem, may be this is a tools problem, can you post this problem to other sub-forums?

 

Thanks

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