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Explorer
Explorer
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Registered: ‎01-20-2019

Multiple DPU kernel | SpNet posedetect model

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Hello Reader,

I hope you are doing great.

I have implemented the B-3136 DPU core in my custom ZU4 device and trying to run the posedetect application by following the below steps:

I have installed the Vitis-ai packages on my custom board.

1 - Re-compiling the SpNet (posedetect) model for the B3136 DPU core.

(vitis-ai-caffe) root@root:/opt/vitis_ai/compiler$ ./vai_c_caffe -p /workspace/models/cf_SPnet_aichallenger_224_128_0.54G/compiler/deploy.prototxt -c /workspace/models/cf_SPnet_aichallenger_224_128_0.54G/compiler/deploy.caffemodel -a /workspace/dcf/evk.json -n sp_net -o /workspace/models/cf_SPnet_aichallenger_224_128_0.54
**************************************************
* VITIS_AI Compilation - Xilinx Inc.
**************************************************
[VAI_C][Warning] layer [pool5_7x7_s1] (type: AveragePool) is not supported in DPU, deploy it in CPU instead.

Kernel topology "sp_net_kernel_graph.jpg" for network "sp_net"
kernel list info for network "sp_net"
Kernel ID : Name
0 : sp_net_0
1 : sp_net_1
2 : sp_net_2

Kernel Name : sp_net_0
--------------------------------------------------------------------------------
Kernel Type : DPUKernel
Code Size : 0.10MB
Param Size : 1.06MB
Workload MACs : 547.63MOPS
IO Memory Space : 0.26MB
Mean Value : 104, 117, 123,
Total Tensor Count : 108
Boundary Input Tensor(s) (H*W*C)
demo:0(0) : 224*128*3

Boundary Output Tensor(s) (H*W*C)
inception_5b_output:0(0) : 7*4*184

Total Node Count : 74
Input Node(s) (H*W*C)
conv1_7x7_s2(0) : 224*128*3

Output Node(s) (H*W*C)
inception_5b_output(0) : 7*4*184

 


Kernel Name : sp_net_1
--------------------------------------------------------------------------------
Kernel Type : CPUKernel
Boundary Input Tensor(s) (H*W*C)
pool5_7x7_s1:0(0) : 7*4*184

Boundary Output Tensor(s) (H*W*C)
pool5_7x7_s1:0(0) : 1*1*184

Input Node(s) (H*W*C)
pool5_7x7_s1 : 7*4*184

Output Node(s) (H*W*C)
pool5_7x7_s1 : 1*1*184

 


Kernel Name : sp_net_2
--------------------------------------------------------------------------------
Kernel Type : DPUKernel
Code Size : 1.32KB
Param Size : 0.01MB
Workload MACs : 0.03MOPS
IO Memory Space : 0.38KB
Mean Value : 0, 0, 0,
Total Tensor Count : 3
Boundary Input Tensor(s) (H*W*C)
pool5_7x7_s1:0(0) : 1*1*184
pool5_7x7_s1:0(1) : 1*1*184

Boundary Output Tensor(s) (H*W*C)
fc_coordinate:0(0) : 1*1*28
fc_visible:0(1) : 1*1*42

Total Node Count : 2
Input Node(s) (H*W*C)
fc_coordinate(0) : 1*1*184
fc_visible(0) : 1*1*184

Output Node(s) (H*W*C)
fc_coordinate(0) : 1*1*28
fc_visible(0) : 1*1*42

As you can see in the above compilation log the compiler successfully generated the output files (.elf) which having the 2-DPU kernel and 1-CPU kernel

2 - copy these (.elf) file to the board /usr/share/vitis-ai-library/models/spnet/ folder and modified the meta.json file as shown below  

{
"target": "DPUv2",
"lib": "libvart_dpu.so",
"filename": "dpu_sp_net_0.elf" , 
"kernel": [ "sp_net_0" , "sp_net_2"], // is it right way?
"config_file": "sp_net.prototxt"
}

But the above meta.json is not working for me and the posedetect application is throwing an error. It seems meta.json is not updated properly or the vitis-ai posedetect application design to work only with single DPU & CPU kernel

could anyone help me to figure out what went wrong in the above steps?

Note:

By following the above 2 steps, I have also tested all the Xilinx model zoo network with B3036 DPU configuration and all are working fine except this posedetect network because for SpNet network the compiler is generating the 2 .elf file so I am not sure for spnet network I have done configuration of meta.json file properly or not.

Error:

04 15:00:05.323353 2463 elf2xir.hpp:317] Check failed: kernel_subgraphs.size() == 2 (0 vs. 2) only support one input kernel and one dpu kernel.
*** Check failure stack trace: ***

Thank you in advance.

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Voyager
Voyager
409 Views
Registered: ‎10-21-2015

Hi @deepg799 

I figured out that sp_net.elf of ZCU102 or ZCU104 is LSB shared object

$ file sp_net.elf 
sp_net.elf: ELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), dynamically linked, BuildID[sha1]=f4908a5a03e30f2cc8f50e39fefba8f79e4c11e6, not stripped

The generated elfs are LSB relocatables

$ file dpu_sp_net_0.elf 
dpu_sp_net_0.elf: ELF 64-bit LSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
$ file dpu_sp_net_2.elf 
dpu_sp_net_2.elf: ELF 64-bit LSB relocatable, ARM aarch64, version 1 (SYSV), not stripped

Can you try elf generated like this?

aarch64-linux-gnu-gcc -fPIC -shared dpu_sp_net_*.elf -o sp_net.elf

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10 Replies
Highlighted
Moderator
Moderator
524 Views
Registered: ‎03-27-2013

Hi @deepg799 ,

 

From the error message I would suggest you to modify the json file first to just call one kernel.

Best Regards,
Jason
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Explorer
Explorer
502 Views
Registered: ‎01-20-2019

Hi @jasonwu 

Thanks for the update.

for the single kernel I am getting the Segmentation fault error.

{
"target": "DPUv2",
"lib": "libvart_dpu.so",
"filename": "dpu_resnet50_0.elf",
"kernel": [ "resnet50_0" ], // Single kernel
"config_file": "resnet50.prototxt"
}

I am not understanding how Xilinx generated the single-DPU kernel (.elf) file.

Any thing needs to modify in the .prototxt file?

 

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Voyager
Voyager
487 Views
Registered: ‎10-21-2015

Hi

sp_net.elf of compiled ZCU102 or ZCU104 model seems to be combined from sp_net_0.elf and sp_net_2.elf

We can guess it with the following command

 

$ nm -D sp_net.elf
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000000000010e6e8 N _dpu_sp_net_0_inception_5b_5x5_inception_5b_5x5_weights
00000000000184cc N _dpu_sp_net_0_inception_5b_5x5_reduce_code
00000000000f4672 N _dpu_sp_net_0_inception_5b_5x5_reduce_inception_5b_5x5_reduce_bias
00000000000f4686 N _dpu_sp_net_0_inception_5b_5x5_reduce_inception_5b_5x5_reduce_weights
0000000000018734 N _dpu_sp_net_0_inception_5b_pool_proj_code
00000000000f5fd6 N _dpu_sp_net_0_inception_5b_pool_proj_inception_5b_pool_proj_bias
00000000000f5fe4 N _dpu_sp_net_0_inception_5b_pool_proj_inception_5b_pool_proj_weights
0000000000000000 N _dpu_sp_net_2_fc_coordinate_code
0000000000000000 N _dpu_sp_net_2_fc_coordinate_fc_coordinate_bias
000000000000001c N _dpu_sp_net_2_fc_coordinate_fc_coordinate_weights
0000000000000228 N _dpu_sp_net_2_fc_visible_code
000000000000143c N _dpu_sp_net_2_fc_visible_fc_visible_bias
0000000000001466 N _dpu_sp_net_2_fc_visible_fc_visible_weights

 

  I think xilinx needs to explain how to combine multiple *.elfs into a single elf

Highlighted
Moderator
Moderator
451 Views
Registered: ‎03-27-2013

Hi @deepg799 ,

 

In the json file you are still using "libvart_dpu.so" are you still testing with Vitis AI 1.0?

I met similar issue when there is a mismatch between kernel name inside json file and the one you got when running vai_c command.

So for one kernel sollution you should call one kernel at a time. How do you get your model? From Xilinx model zoo?

Best Regards,
Jason
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Moderator
Moderator
444 Views
Registered: ‎03-27-2013

Hi @hokim@deepg799 ,

 

I can find the sd_net model and reference on-board model file. Yes, there is only one ELF file.

That make a point, let me have a try on my side and come back to you.

Best Regards,
Jason
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Explorer
Explorer
428 Views
Registered: ‎01-20-2019

Hi @jasonwu 

Yes, Currently I am using Vitis1.0.

Unfortunately, I am not able to pull the docker image for installing the Vitis1.1 on host PC that is the reason I want with Vitis1.0. is there any other way to download the docker image without pulling it from the below link?

https://hub.docker.com/r/xilinx/vitis-ai/tags

error: Error response from daemon: Get https://registry-1.docker.io/v2/: proxyconnect tcp: dial tcp: lookup proxy.example.com on [::1]:53: read udp [::1]:47123->[::1]:53: read: connection refused

Yes, u are right, The Spnet model I downloaded from the Xilinx model zoo and I tried the SpNet model from both the model zoo 1.0 & 1.1, and the result is the same for both.

Even I used Dnndk3.1 based DNNC compiler by It is also generating the multiple DPU kernel configuration file.

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Moderator
Moderator
412 Views
Registered: ‎03-27-2013

Hi @deepg799 ,

 

All I know is from: https://github.com/Xilinx/Vitis-AI/blob/v1.1/README.md

I just build the image locally.

For sp_net issue let me try to do some investigation on my side. And I also inform my dev contact, but it may take some time to get feedback.

Best Regards,
Jason
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Highlighted
Voyager
Voyager
410 Views
Registered: ‎10-21-2015

Hi @deepg799 

I figured out that sp_net.elf of ZCU102 or ZCU104 is LSB shared object

$ file sp_net.elf 
sp_net.elf: ELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), dynamically linked, BuildID[sha1]=f4908a5a03e30f2cc8f50e39fefba8f79e4c11e6, not stripped

The generated elfs are LSB relocatables

$ file dpu_sp_net_0.elf 
dpu_sp_net_0.elf: ELF 64-bit LSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
$ file dpu_sp_net_2.elf 
dpu_sp_net_2.elf: ELF 64-bit LSB relocatable, ARM aarch64, version 1 (SYSV), not stripped

Can you try elf generated like this?

aarch64-linux-gnu-gcc -fPIC -shared dpu_sp_net_*.elf -o sp_net.elf

View solution in original post

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Explorer
Explorer
402 Views
Registered: ‎01-20-2019

Hi @hokim 

I will check and update the same.

Thanks for the support.

Highlighted
Moderator
Moderator
325 Views
Registered: ‎03-27-2013

Hi @deepg799 , @hokim ,

 

Good to know that you find the sollution by yourself.

It is only confirmed that the ELFs need to be combined to work and the dev team is planning to publish more details in further release. But for now I still got no update about how to do that.

Please just work with it and feel free to send a post if you meet further question.

Best Regards,
Jason
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