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abdmohamed
Visitor
Visitor
468 Views
Registered: ‎04-11-2021

Open dpu.xclbin failed Vitis AI 1.3 Vivado Flow

I am following the Vivado 2020.2 flow for installing Vitis-AI 1.3 on the Ultra96v2 development board on this link:

Customizing and Generating the Core in the Zynq UltraScale+ MPSoC (xilinx.com)

After flashing the OS image into an SD card and setting up the board, I tried running a python script but got the following error:

AttributeError: module 'xir' has no attribute 'Graph'

I followed the instructions in the link below to fix the error:

AttributeError: module 'xir' has no attribute 'Graph' · Issue #280 · Xilinx/Vitis-AI (github.com)

However, I am now getting this new error:

F0412 05:00:33.204634  2074 xrt_bin_stream.cpp:59] Check failed: fd_ > 0 (-1 vs. 0) , open(/media/sd-mmcblk0p1/dpu.xclbin) failed.
*** Check failure stack trace: ***
Aborted

 Since I followed the Vivado flow, I don't have the `dpu.xclbin` file. How can I solve this issue (without switching to the Vitis flow)?

7 Replies
linqiang
Xilinx Employee
Xilinx Employee
399 Views
Registered: ‎05-10-2019

Hi @abdmohamed 

For Vivado flow, vart also supports it. However, it will use dpu.ko not zocl.ko. For Vitis flow, vart will use zocl.ko which will need dpu.xclbin.

So it seems that dpu.ko is missing in your system. You can run the following command to check if dpu.ko installed in your system.

root@xilinx-zcu104-2020_2:~# lsmod
Module Size Used by
dmaproxy 16384 0
dpu 45056 0
dpcma 16384 0
mali 319488 0

 

Besides, you can also refer to https://github.com/Xilinx/Vitis-AI/tree/master/dsa/DPU-TRD/prj/Vivado to check if there is some steps missing.

Also, you can refer to the following steps to add dpu.ko

Step 1: Check if there are dpu and dpcma source codes in the following location, if not, add them.

xilinx-zcu102-trd/project-spec/meta-user/recipes-modules/dpu/files
xilinx-zcu102-trd/project-spec/meta-user/recipes-modules/dpcma/files

Step 2: Enable dpu and dpcma

      AAdd “CONFIG_dpu” and “CONFIG_dpcma” in xilinx-zcu102-trd/project-spec/meta-user/conf/user-rootfsconfig

cat user-rootfsconfig

 

#Note: Mention Each package in individual line
#These packages will get added into rootfs menu entryCONFIG_gpio-demo
CONFIG_peekpoke
CONFIG_dpu
CONFIG_dpcma

      BEnable dpu & dpcma via run petalinux-config -c rootfs  command

linqiang_0-1618283908382.jpeg

 

 

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abdmohamed
Visitor
Visitor
365 Views
Registered: ‎04-11-2021

Hi @linqiang,

Thanks for the quick reply. I did not have those 2 modules installed, but now I do . Both `dpu` and `zocl` now show up when I type `lsmod` after booting the board. For some reason I have to load `dpcma` module manually. I still get the same errors above when I run the python script (I only use `vart` and `xir` modules). I get the following error if I unload `zocl` module:

WARNING: Logging before InitGoogleLogging() is written to STDERR
F0413 22:30:19.898774  1383 dpu_controller.cpp:44] Check failed: !the_factory_methods.empty()
*** Check failure stack trace: ***
Aborted

 

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davidtsu0901
Observer
Observer
332 Views
Registered: ‎04-14-2021

Hey @abdmohamed 

I hope you have fixed your problem. Do you have any problem when you sudo cp xclbin file to /usr/lib/ inside the docker Vitis-ai? I cannot sudo cp as it says "sudo must be owned by uid 0 and have the setuid bit set" as I can only enter vitis-ai docker with a non-root user called vitis-ai-user. Thanks a lot. 

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junpengl
Xilinx Employee
Xilinx Employee
318 Views
Registered: ‎05-28-2019

Hi @abdmohamed ,

    As describeded by linqiang, you need to follow that two steps, In addtion, you need enable xrt but disable zocl(a. disable zocl in petalinux-config -c rootfs  b. deleta zocl configuration in devicetree in recipes-bsp/device-tree/files/system-user.dtsi). As for Vivado flow, we should enable DPU driver and disable ZOCL driver; As for Vitis flow, we should enable ZOCL driver and disable DPU driver. they can't be enabled in  one mode at some time, which they are two different development mode.

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abdmohamed
Visitor
Visitor
284 Views
Registered: ‎04-11-2021

Hi @junpengl,

Thanks for the clarification. I went ahead and removed `zocl` configuration from the device tree and disabled its module. However, I am still getting the same error:

WARNING: Logging before InitGoogleLogging() is written to STDERR
F0414 19:14:33.995081  1326 dpu_controller.cpp:44] Check failed: !the_factory_methods.empty()
*** Check failure stack trace: ***
Aborted
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abdmohamed
Visitor
Visitor
280 Views
Registered: ‎04-11-2021

@davidtsu0901, the workflow for setting up Edge devices is different from the workflow for Alveo cards. So, unfortunately, I can not help you as I have no experience setting up Vitis-AI on Alveo cards.

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junpengl
Xilinx Employee
Xilinx Employee
230 Views
Registered: ‎05-28-2019

Hi @abdmohamed ,

      How do your build your petalinux SD card image? As you konw, We have only released Vitis AI Vivado flow reference(1.1,1.2,1.3) for zcu102 in https://github.com/Xilinx/Vitis-AI/tree/master/dsa/DPU-TRD/prj/Vivado  . I'm sorry that I have no idea about your Customizing and Generating the Core in the Zynq UltraScale+ MPSoC (xilinx.com) BTW, the Vitis AI Vivado flow involves the hardware design, petalinux filesystem build,  vitis AI runtime and demo, as for petalinux filesystem build section, as linqiang and me describled prior, and the released bsp https://github.com/Xilinx/Vitis-AI/tree/master/dsa/DPU-TRD/prj/Vivado/dpu_petalinux_bsp provide the code structure and source code reference.

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