02-01-2020 07:20 AM
Hi all,
Would anyone know whether there is somewhere a peta image where DPU is installed and running on PL of Ultar96_v2 hardware?
Like the one on Xilinx webpage: https://www.xilinx.com/member/forms/download/ultra96-image-license-xef.html?filename=petalinux-user-image-ultra96-zynqmp-sd-20190802.img.gz
Or the other option is TRD with all scripts and bsp but dedicated for Ultra96_v2 which may be used by me to build the linux app myself as briefly described in pg338-dpu.
Thanks in advance
02-04-2020 01:25 AM - edited 02-04-2020 01:27 AM
Hi @dcygan
The petalinux-user-image-ultra96-zynqmp-sd-20190802.img.gz is an image, not a bsp and it is for V1. It seams that Xilinx does not release any BSP for V2.
So you could try DPU Integration Lab (https://github.com/Xilinx/Edge-AI-Platform-Tutorials/tree/3.1/docs/DPU-Integration) with its resources and use DPU TRD of ZCU102 instead, at https://www.xilinx.com/products/design-tools/ai-inference/ai-developer-hub.html#edge
Be carefull with creating hardware for V2 because there is a difference in DDR configs compared with V1, which is described here: https://www.element14.com/community/community/designcenter/zedboardcommunity/ultra96/ultra96-v2/blog/2019/07/13/lpddr4-memory-differences-between-ultra96-v1-and-ultra96-v2
Also, this link may help you understand the flow: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841937/Zynq+UltraScale+MPSoC+Ubuntu+part+2+-+Building+and+Running+the+Ubuntu+Desktop+From+Sources
Regards,
02-19-2020 03:51 AM
Hi @hungdbk92
Thanks, great examples but still some doubts about details.
1. The 'DPU Integration LAB' comes with hardware platform (.tlc) doesn't have bsp file but in the lab petlinux project is created from tempalate zyncMP and then configured using .hdf platform description
2. The 'xilinx TRD' comes with hardware platform (.tlc) and bsp and I guess I should create petalinux project using the bsp. You saying I should try LAB with resources from TRD - what do you exactly mean, what to overwrite?
What is missing in 'LAB' that has to be taken from TRD? Newer DPU IP?? All this is a bit confusing.. to put all together in a working app.
02-20-2020 07:17 AM
Hello dcygan.
I ran Vitis AI on Ultra96 V2. The cf_resnet50 demo worked.
I wrote how to do this in a Japanese blog.
https://qiita.com/basaro_k/items/e71a7fcb1125cf8df7d2
I made Vitis Platform for Ultra96v2, and add on DPU IP using Vitis platform.
02-20-2020 08:35 PM
02-20-2020 08:53 PM - edited 02-20-2020 08:54 PM
Hi @dcygan
1. Yes, you have to define hardware first because petalinux need a .hdf. So you can use that TCL script OR create your own project with Vivado. You may get newer DPU from ZCU102 TRD at this step and don't forget to update the DDR configuration for V2.
2. Don't use the ZCU102 TRD bsp, just extract the bsp and get its 'resources' that you need (listed in the Lab)
Hope that help!
Regards,