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asobeih
Explorer
Explorer
232 Views
Registered: ‎02-13-2016

Report Power and Resources Utilization in DPU Vitis Flow

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Hello,

I am going through the Vitis flow to implement the DPU on ZCU104 board. How/Where can I get the power and resource utilization reports for the implemented DPU core(s)? I need the report that can be generated by the tool.

Thanks.

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graces
Moderator
Moderator
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Registered: ‎07-16-2008

You may try to open the underlying Vivado project and explore the power/resource utilization.

DPU-TRD/prj/Vitis/binary_container_1/link/vivado/vpl

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If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs.
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asobeih
Explorer
Explorer
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Registered: ‎02-13-2016

Hi,

I still look forward to an answer to this. This is the flow I am following:

https://github.com/Xilinx/Vitis-AI/tree/1.2/DPU-TRD/prj/Vitis

@jheaton , Maybe you would b able to help me please with that?

Thanks.

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graces
Moderator
Moderator
84 Views
Registered: ‎07-16-2008

You may try to open the underlying Vivado project and explore the power/resource utilization.

DPU-TRD/prj/Vitis/binary_container_1/link/vivado/vpl

-----------------------------------------------------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs.
-----------------------------------------------------------------------------------------------------------------------

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jheaton
Xilinx Employee
Xilinx Employee
29 Views
Registered: ‎03-21-2008

@asobeih 
When you build the hw for the DPU TRD with Vitis, there is a Vivado project (.xpr file) that gets created in DPU-TRD/prj/Vitis/binary_container_1/link/vivado/vpl/prj/

You can open up the project, load the implanted design and the run report_power or report_utilzation.

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